Angel Pons | 60ec365 | 2020-04-03 01:22:13 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 4 | #include <arch/io.h> |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 5 | #include <cpu/x86/smm.h> |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 6 | #include <southbridge/intel/bd82x6x/pch.h> |
| 7 | #include <southbridge/intel/bd82x6x/me.h> |
| 8 | #include <northbridge/intel/sandybridge/sandybridge.h> |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 9 | |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 10 | /* |
| 11 | * Change LED_POWER# (SIO GPIO 45) state based on sleep type. |
| 12 | * The IO address is hardcoded as we don't have device path in SMM. |
| 13 | */ |
| 14 | #define SIO_GPIO_BASE_SET4 (0x730 + 3) |
| 15 | #define SIO_GPIO_BLINK_GPIO45 0x25 |
| 16 | void mainboard_smi_sleep(u8 slp_typ) |
| 17 | { |
| 18 | u8 reg8; |
| 19 | |
| 20 | switch (slp_typ) { |
Aaron Durbin | 30b0c7a | 2016-07-13 13:01:13 -0500 | [diff] [blame] | 21 | case ACPI_S3: |
| 22 | case ACPI_S4: |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 23 | break; |
| 24 | |
Aaron Durbin | 30b0c7a | 2016-07-13 13:01:13 -0500 | [diff] [blame] | 25 | case ACPI_S5: |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 26 | /* Turn off LED */ |
| 27 | reg8 = inb(SIO_GPIO_BASE_SET4); |
| 28 | reg8 |= (1 << 5); |
| 29 | outb(reg8, SIO_GPIO_BASE_SET4); |
| 30 | break; |
| 31 | } |
| 32 | } |