blob: 57149b75b1bfd29bbb333a854dff760f6a0e67f7 [file] [log] [blame]
Angel Pons381c4eb2020-04-03 01:22:06 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Patrick Rudolph05284b62019-06-04 15:56:44 +02002
Furquan Shaikh76cedd22020-05-02 10:24:23 -07003#include <acpi/acpi.h>
Patrick Rudolph05284b62019-06-04 15:56:44 +02004DefinitionBlock(
5 "dsdt.aml",
6 "DSDT",
Elyes HAOUAS90d00de2020-10-05 16:38:53 +02007 ACPI_DSDT_REV_2,
Patrick Rudolph05284b62019-06-04 15:56:44 +02008 OEM_ID,
9 ACPI_TABLE_CREATOR,
10 0x20141018 // OEM revision
11)
12{
Kyösti Mälkkicf246d52021-01-21 08:17:00 +020013 #include <acpi/dsdt_top.asl>
Patrick Rudolph05284b62019-06-04 15:56:44 +020014 #include "acpi/platform.asl"
15 #include <cpu/intel/common/acpi/cpu.asl>
Arthur Heymans6c13b042019-11-02 17:19:26 +010016 #include <southbridge/intel/common/acpi/platform.asl>
Patrick Rudolph05284b62019-06-04 15:56:44 +020017 /* global NVS and variables. */
18 #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
Subrata Banik2715cdb2019-10-30 16:48:19 +053019 #include <southbridge/intel/common/acpi/sleepstates.asl>
Patrick Rudolph05284b62019-06-04 15:56:44 +020020
21 Scope (\_SB) {
22 Device (PCI0)
23 {
Bill XIEfc2dc0b2022-10-12 20:47:34 +080024 #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
25 #include <southbridge/intel/bd82x6x/acpi/pch.asl>
Bill XIEfa963fd2022-10-12 18:23:11 +080026 #include "acpi/pci.asl"
Patrick Rudolph05284b62019-06-04 15:56:44 +020027 }
28 }
29}