Angel Pons | feedf23 | 2020-04-05 13:22:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 2 | |
Kyösti Mälkki | ab72809 | 2014-05-03 16:47:52 +0300 | [diff] [blame] | 3 | #include <bootmode.h> |
Kyösti Mälkki | 9c5a9bb | 2019-08-17 05:28:38 +0300 | [diff] [blame] | 4 | #include <boot/coreboot_tables.h> |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 5 | #include <southbridge/intel/bd82x6x/pch.h> |
Patrick Rudolph | e8e66f4 | 2016-02-06 17:42:42 +0100 | [diff] [blame] | 6 | #include <southbridge/intel/common/gpio.h> |
Kyösti Mälkki | 9a3bde0 | 2021-11-06 16:13:15 +0200 | [diff] [blame] | 7 | #include <types.h> |
Aaron Durbin | b0f8151 | 2016-07-25 21:31:41 -0500 | [diff] [blame] | 8 | #include <vendorcode/google/chromeos/chromeos.h> |
Kyösti Mälkki | 4bcc275 | 2021-11-05 22:02:26 +0200 | [diff] [blame] | 9 | #include "onboard.h" |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 10 | |
Hsuan-ting Chen | 642508a | 2021-10-27 10:59:41 +0000 | [diff] [blame] | 11 | #define GPIO_EC_IN_RW 21 |
| 12 | |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 13 | void fill_lb_gpios(struct lb_gpios *gpios) |
| 14 | { |
Joel Kitching | 2e1f655 | 2019-03-23 12:41:04 +0800 | [diff] [blame] | 15 | struct lb_gpio chromeos_gpios[] = { |
Joel Kitching | 2e1f655 | 2019-03-23 12:41:04 +0800 | [diff] [blame] | 16 | /* Lid: the "switch" comes from the EC */ |
| 17 | {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 18 | |
Joel Kitching | 2e1f655 | 2019-03-23 12:41:04 +0800 | [diff] [blame] | 19 | /* Power Button: hard-coded as not pressed; we'll detect later |
| 20 | * presses via SMI. */ |
| 21 | {-1, ACTIVE_HIGH, 0, "power"}, |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 22 | |
Joel Kitching | 2e1f655 | 2019-03-23 12:41:04 +0800 | [diff] [blame] | 23 | /* Did we load the VGA Option ROM? */ |
| 24 | /* -1 indicates that this is a pseudo GPIO */ |
| 25 | {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, |
| 26 | }; |
| 27 | lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 28 | } |
Stefan Reinauer | 49428d8 | 2013-02-21 15:48:37 -0800 | [diff] [blame] | 29 | |
Patrick Georgi | 2f31ef1 | 2015-06-30 12:49:50 +0200 | [diff] [blame] | 30 | int get_write_protect_state(void) |
| 31 | { |
Kyösti Mälkki | 4bcc275 | 2021-11-05 22:02:26 +0200 | [diff] [blame] | 32 | return get_gpio(GPIO_SPI_WP); |
Patrick Georgi | 2f31ef1 | 2015-06-30 12:49:50 +0200 | [diff] [blame] | 33 | } |
| 34 | |
Aaron Durbin | b0f8151 | 2016-07-25 21:31:41 -0500 | [diff] [blame] | 35 | static const struct cros_gpio cros_gpios[] = { |
Kyösti Mälkki | 4bcc275 | 2021-11-05 22:02:26 +0200 | [diff] [blame] | 36 | CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), |
| 37 | CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), |
Aaron Durbin | b0f8151 | 2016-07-25 21:31:41 -0500 | [diff] [blame] | 38 | }; |
Kyösti Mälkki | 4ff218a | 2021-11-02 13:03:06 +0200 | [diff] [blame] | 39 | DECLARE_CROS_GPIOS(cros_gpios); |
Hsuan-ting Chen | 642508a | 2021-10-27 10:59:41 +0000 | [diff] [blame] | 40 | |
| 41 | int get_ec_is_trusted(void) |
| 42 | { |
| 43 | /* EC is trusted if not in RW. */ |
| 44 | return !get_gpio(GPIO_EC_IN_RW); |
| 45 | } |