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Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -08001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -08004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8
9 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +020010 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080011 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
12 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
13 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
14 register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
15 register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
16
Matt DeVilliere2c4a352019-01-10 12:51:56 -060017 # Set backlight PWM values
18 register "gpu_cpu_backlight" = "0x000001e8"
19 register "gpu_pch_backlight" = "0x03d00000"
20
Alexandru Gagniuc83b05eb2015-02-15 14:09:21 -060021 register "max_mem_clock_mhz" = "666" # DDR3-1333
22
Stefan Reinauer4aff4452013-02-12 14:17:15 -080023 device domain 0 on
Arthur Heymansb5df65a2022-11-12 14:51:49 +010024 device ref host_bridge on end # host bridge
25 device ref peg10 off end # PCIe Bridge for discrete graphics
26 device ref igd on end # vga controller
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080027
28 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080029 # GPI routing
30 # 0 No effect (default)
31 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
32 # 2 SCI (if corresponding GPIO_EN bit is also set)
33 register "alt_gp_smi_en" = "0x0000"
34 #register "gpi1_routing" = "1" #SMI from EC
35 register "gpi13_routing" = "2" #SCI from EC
36
Shawn Nematbakhsh7b8952c2013-03-14 11:03:59 -070037 # Enable SATA ports 0 & 1
38 register "sata_port_map" = "0x3"
39 # Set max SATA speed to 3.0 Gb/s
40 register "sata_interface_speed_support" = "0x2"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080041
42 # Enable EC Port 0x68/0x6C
43 register "gen1_dec" = "0x00040069"
44
45 # EC range is 0x380-0387
46 register "gen2_dec" = "0x00040381"
47
48 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010049 register "pcie_port_coalesce" = "true"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080050
Arthur Heymansb5df65a2022-11-12 14:51:49 +010051 device ref xhci on end # USB 3.0 Controller
52 device ref mei1 on end # Management Engine Interface 1
53 device ref mei2 off end # Management Engine Interface 2
54 device ref me_ide_r off end # Management Engine IDE-R
55 device ref me_kt off end # Management Engine KT
56 device ref gbe off end # Intel Gigabit Ethernet
57 device ref ehci2 on end # USB2 EHCI #2
58 device ref hda on end # High Definition Audio
59 device ref pcie_rp1 on end # PCIe Port #1 (mini PCIe Slot - WLAN & Serial debug)
60 device ref pcie_rp2 on end # PCIe Port #2 (ETH0)
61 device ref pcie_rp3 on end # PCIe Port #3 (Card Reader)
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080062 #force ASPM for PCIe bridge to Card Reader
Angel Pons02396842021-06-05 12:34:23 +020063 register "pcie_aspm[2]" = "0x3"
Arthur Heymansb5df65a2022-11-12 14:51:49 +010064 device ref pcie_rp4 off end # PCIe Port #4
65 device ref pcie_rp5 off end # PCIe Port #5
66 device ref pcie_rp6 off end # PCIe Port #6
67 device ref pcie_rp7 off end # PCIe Port #7
68 device ref pcie_rp8 off end # PCIe Port #8
69 device ref ehci1 on end # USB2 EHCI #1
70 device ref pci_bridge off end # PCI bridge
71 device ref lpc on #LPC bridge
Matt DeVillier3044af72018-08-01 13:05:14 -050072 chip drivers/pc80/tpm
73 device pnp 0c31.0 on end
74 end
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080075 chip ec/quanta/ene_kb3940q
76 # 60/64 KBC
77 device pnp ff.1 on # dummy address
78 end
79 end
80 end # LPC bridge
Arthur Heymansb5df65a2022-11-12 14:51:49 +010081 device ref sata1 on end # SATA Controller 1
82 device ref smbus on end # SMBus
83 device ref sata2 off end # SATA Controller 2
84 device ref thermal on end # Thermal
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080085 end
86 end
87end