Angel Pons | 1731d46 | 2020-04-03 01:21:31 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 2 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 4 | #include <stdint.h> |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 5 | #include <arch/io.h> |
Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 6 | #include <northbridge/intel/sandybridge/raminit_native.h> |
Kyösti Mälkki | 2a3f9f5 | 2019-08-26 13:59:54 +0300 | [diff] [blame] | 7 | #include <superio/smsc/sio1007/sio1007.h> |
Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 8 | #include <southbridge/intel/bd82x6x/pch.h> |
Hal Martin | aba468b | 2017-12-05 20:52:09 +0000 | [diff] [blame] | 9 | |
| 10 | #define SIO_PORT 0x164e |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 11 | |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 12 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 13 | { 1, 1, 0 }, |
| 14 | { 1, 1, 0 }, |
| 15 | { 1, 1, 1 }, |
| 16 | { 1, 1, 1 }, |
| 17 | { 1, 0, 2 }, |
| 18 | { 1, 0, 2 }, |
| 19 | { 1, 0, 3 }, |
| 20 | { 1, 0, 3 }, |
| 21 | { 1, 1, 4 }, |
| 22 | { 1, 1, 4 }, |
| 23 | { 1, 0, 5 }, |
| 24 | { 1, 0, 5 }, |
| 25 | { 1, 0, 6 }, |
| 26 | { 1, 0, 6 }, |
| 27 | }; |
| 28 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 29 | void bootblock_mainboard_early_init(void) |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 30 | { |
Hal Martin | aba468b | 2017-12-05 20:52:09 +0000 | [diff] [blame] | 31 | const u16 port = SIO_PORT; |
| 32 | const u16 runtime_port = 0x180; |
| 33 | |
Nico Huber | ce20697 | 2019-11-17 00:42:57 +0100 | [diff] [blame] | 34 | /* Enable COM1 if requested */ |
| 35 | if (CONFIG(DRIVERS_UART_8250IO)) |
| 36 | sio1007_enable_uart_at(port); |
| 37 | |
Hal Martin | aba468b | 2017-12-05 20:52:09 +0000 | [diff] [blame] | 38 | /* Turn on configuration mode. */ |
| 39 | outb(0x55, port); |
| 40 | |
| 41 | /* Set the GPIO direction, polarity, and type. */ |
| 42 | sio1007_setreg(port, 0x31, 1 << 0, 1 << 0); |
| 43 | sio1007_setreg(port, 0x32, 0 << 0, 1 << 0); |
| 44 | sio1007_setreg(port, 0x33, 0 << 0, 1 << 0); |
| 45 | |
| 46 | /* Set the base address for the runtime register block. */ |
| 47 | sio1007_setreg(port, 0x30, runtime_port >> 4, 0xff); |
| 48 | sio1007_setreg(port, 0x21, runtime_port >> 12, 0xff); |
| 49 | |
| 50 | /* Turn on address decoding for it. */ |
| 51 | sio1007_setreg(port, 0x3a, 1 << 1, 1 << 1); |
| 52 | |
| 53 | /* Set the value of GPIO 10 by changing GP1, bit 0. */ |
| 54 | u8 byte; |
| 55 | byte = inb(runtime_port + 0xc); |
| 56 | byte |= (1 << 0); |
| 57 | outb(byte, runtime_port + 0xc); |
| 58 | |
| 59 | /* Turn off address decoding for it. */ |
| 60 | sio1007_setreg(port, 0x3a, 0 << 1, 1 << 1); |
| 61 | |
| 62 | /* Turn off configuration mode. */ |
| 63 | outb(0xaa, port); |
Hal Martin | de7f8d3 | 2017-10-28 10:58:08 +0000 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 67 | { |
| 68 | read_spd(&spd[0], 0x50, id_only); |
| 69 | read_spd(&spd[2], 0x52, id_only); |
| 70 | } |