Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 1 | chip soc/intel/jasperlake |
| 2 | |
| 3 | # Intel Common SoC Config |
| 4 | #+-------------------+---------------------------+ |
| 5 | #| Field | Value | |
| 6 | #+-------------------+---------------------------+ |
| 7 | #| GSPI0 | cr50 TPM. Early init is | |
| 8 | #| | required to set up a BAR | |
| 9 | #| | for TPM communication | |
| 10 | #| | before memory is up | |
Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 11 | #| I2C4 | Audio | |
| 12 | #+-------------------+---------------------------+ |
| 13 | register "common_soc_config" = "{ |
| 14 | .gspi[0] = { |
| 15 | .speed_mhz = 1, |
| 16 | .early_init = 1, |
| 17 | }, |
Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 18 | .i2c[4] = { |
Amanda Huang | 48286ab | 2023-03-13 11:05:29 +0800 | [diff] [blame] | 19 | .speed_config[0] = { |
| 20 | .speed = I2C_SPEED_FAST, |
| 21 | .scl_lcnt = 190, |
| 22 | .scl_hcnt = 100, |
| 23 | .sda_hold = 40, |
| 24 | } |
Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 25 | }, |
| 26 | }" |
| 27 | |
Chia-Ling Hou | b5a0328 | 2023-06-07 16:53:00 +0800 | [diff] [blame^] | 28 | # Power limit config |
| 29 | register "power_limits_config[JSL_N4500_6W_CORE]" = "{ |
| 30 | .tdp_pl1_override = 6, |
| 31 | .tdp_pl2_override = 20, |
| 32 | .tdp_pl4 = 60, |
| 33 | }" |
| 34 | |
| 35 | register "power_limits_config[JSL_N5100_6W_CORE]" = "{ |
| 36 | .tdp_pl1_override = 6, |
| 37 | .tdp_pl2_override = 20, |
| 38 | .tdp_pl4 = 60, |
| 39 | }" |
| 40 | |
Liam Flaherty | 3dba47a | 2023-01-13 11:46:19 +1100 | [diff] [blame] | 41 | # Enable Root Port 3 (index 2) for LAN |
| 42 | # External PCIe port 7 is mapped to PCIe Root Port 3 |
| 43 | register "PcieRpEnable[2]" = "1" |
| 44 | register "PcieClkSrcUsage[4]" = "2" |
| 45 | |
| 46 | # Enable Root Port 7 (index 6) for WLAN |
| 47 | # External PCIe port 3 is mapped to PCIe Root Port 7 |
| 48 | register "PcieRpEnable[6]" = "1" |
| 49 | register "PcieClkSrcUsage[3]" = "6" |
| 50 | |
| 51 | # Disable PCIe Root Port 8 |
| 52 | register "PcieRpEnable[7]" = "0" |
| 53 | |
| 54 | # Audio related configurations |
| 55 | register "PchHdaAudioLinkDmicEnable[0]" = "0" |
| 56 | register "PchHdaAudioLinkDmicEnable[1]" = "0" |
| 57 | |
| 58 | # Disable SD card |
| 59 | register "sdcard_cd_gpio" = "0" |
| 60 | register "SdCardPowerEnableActiveHigh" = "0" |
| 61 | |
| 62 | # Disable eDP on port A |
| 63 | register "DdiPortAConfig" = "0" |
| 64 | |
| 65 | # Enable HPD and DDC for DDI port A |
| 66 | register "DdiPortAHpd" = "1" |
| 67 | register "DdiPortADdc" = "1" |
| 68 | |
| 69 | # USB Port Configuration |
Amanda Huang | bd86b0c | 2023-02-23 17:21:42 +0800 | [diff] [blame] | 70 | register "usb2_ports[0]" = "{ |
| 71 | .enable = 1, |
| 72 | .ocpin = OC_SKIP, |
| 73 | .tx_bias = USB2_BIAS_0MV, |
| 74 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 75 | .pre_emp_bias = USB2_BIAS_11P25MV, |
| 76 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 77 | }" # Type-C Port 0 |
| 78 | register "usb2_ports[1]" = "{ |
| 79 | .enable = 1, |
| 80 | .ocpin = OC1, |
| 81 | .tx_bias = USB2_BIAS_0MV, |
| 82 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 83 | .pre_emp_bias = USB2_BIAS_11P25MV, |
| 84 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 85 | }" # Type-A Port A0 |
| 86 | register "usb2_ports[2]" = "{ |
| 87 | .enable = 1, |
| 88 | .ocpin = OC2, |
| 89 | .tx_bias = USB2_BIAS_0MV, |
| 90 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 91 | .pre_emp_bias = USB2_BIAS_11P25MV, |
| 92 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 93 | }" # Type-A Port A1 |
| 94 | register "usb2_ports[3]" = "{ |
| 95 | .enable = 1, |
| 96 | .ocpin = OC3, |
| 97 | .tx_bias = USB2_BIAS_0MV, |
| 98 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 99 | .pre_emp_bias = USB2_BIAS_11P25MV, |
| 100 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 101 | }" # Type-A Port A2 |
| 102 | register "usb2_ports[4]" = "{ |
| 103 | .enable = 1, |
| 104 | .ocpin = OC0, |
| 105 | .tx_bias = USB2_BIAS_0MV, |
| 106 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 107 | .pre_emp_bias = USB2_BIAS_11P25MV, |
| 108 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 109 | }" # Type-A Port A3 |
Sam McNally | 8b4154c | 2023-02-20 14:05:54 +1100 | [diff] [blame] | 110 | register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303 |
Liam Flaherty | 3dba47a | 2023-01-13 11:46:19 +1100 | [diff] [blame] | 111 | |
| 112 | register "usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3/2 Type-C Port C1 |
| 113 | register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2 |
| 114 | register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A3 |
| 115 | |
Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 116 | device domain 0 on |
Liam Flaherty | 3dba47a | 2023-01-13 11:46:19 +1100 | [diff] [blame] | 117 | device pci 04.0 on |
| 118 | chip drivers/intel/dptf |
| 119 | ## Passive Policy |
| 120 | register "policies.passive" = "{ |
| 121 | [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), |
| 122 | [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), |
| 123 | [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 15000), |
| 124 | [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 55, 15000) |
| 125 | }" |
| 126 | |
| 127 | ## Critical Policy |
| 128 | register "policies.critical" = "{ |
| 129 | [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), |
| 130 | [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), |
| 131 | [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), |
| 132 | [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN) |
| 133 | }" |
| 134 | |
| 135 | register "controls.power_limits" = "{ |
| 136 | .pl1 = { |
| 137 | .min_power = 3000, |
| 138 | .max_power = 6000, |
| 139 | .time_window_min = 1 * MSECS_PER_SEC, |
| 140 | .time_window_max = 1 * MSECS_PER_SEC, |
| 141 | .granularity = 100, |
| 142 | }, |
| 143 | .pl2 = { |
| 144 | .min_power = 20000, |
| 145 | .max_power = 20000, |
| 146 | .time_window_min = 1 * MSECS_PER_SEC, |
| 147 | .time_window_max = 1 * MSECS_PER_SEC, |
| 148 | .granularity = 1000, |
| 149 | } |
| 150 | }" |
| 151 | |
| 152 | register "options.tsr[0].desc" = ""Memory"" |
| 153 | register "options.tsr[1].desc" = ""Power"" |
| 154 | register "options.tsr[2].desc" = ""Chassis"" |
| 155 | |
| 156 | ## Charger Performance Control (Control, mA) |
| 157 | register "controls.charger_perf" = "{ |
| 158 | [0] = { 255, 3000 }, |
| 159 | [1] = { 24, 1500 }, |
| 160 | [2] = { 16, 1000 }, |
| 161 | [3] = { 8, 500 } |
| 162 | }" |
| 163 | |
| 164 | device generic 0 on end |
| 165 | end |
| 166 | end # SA Thermal device |
| 167 | device pci 14.0 on |
| 168 | chip drivers/usb/acpi |
| 169 | # TODO (b/264960828) verify PLD values |
| 170 | device usb 0.0 on |
| 171 | chip drivers/usb/acpi |
| 172 | register "desc" = ""USB2 Type-C Port C0"" |
| 173 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 174 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 175 | device usb 2.0 on end |
| 176 | end |
| 177 | chip drivers/usb/acpi |
| 178 | register "desc" = ""USB2 Type-A Port A0"" |
| 179 | register "type" = "UPC_TYPE_A" |
| 180 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 181 | device usb 2.1 on end |
| 182 | end |
| 183 | chip drivers/usb/acpi |
| 184 | register "desc" = ""USB2 Type-A Port A1"" |
| 185 | register "type" = "UPC_TYPE_A" |
| 186 | register "group" = "ACPI_PLD_GROUP(1, 3)" |
| 187 | device usb 2.2 on end |
| 188 | end |
| 189 | chip drivers/usb/acpi |
| 190 | register "desc" = ""USB2 Type-A Port A2"" |
| 191 | register "type" = "UPC_TYPE_A" |
| 192 | register "group" = "ACPI_PLD_GROUP(1, 4)" |
| 193 | device usb 2.3 on end |
| 194 | end |
| 195 | chip drivers/usb/acpi |
| 196 | register "desc" = ""USB2 Type-A Port A3"" |
| 197 | register "type" = "UPC_TYPE_A" |
| 198 | register "group" = "ACPI_PLD_GROUP(1, 5)" |
| 199 | device usb 2.4 on end |
| 200 | end |
| 201 | chip drivers/usb/acpi |
| 202 | register "desc" = ""USB3 Type-C Port C0"" |
| 203 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 204 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 205 | device usb 3.0 on end |
| 206 | end |
| 207 | chip drivers/usb/acpi |
| 208 | device usb 3.1 off end |
| 209 | end |
| 210 | chip drivers/usb/acpi |
| 211 | register "desc" = ""USB3 Type-A Port A0"" |
| 212 | register "type" = "UPC_TYPE_USB3_A" |
| 213 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 214 | device usb 3.2 on end |
| 215 | end |
| 216 | chip drivers/usb/acpi |
| 217 | register "desc" = ""USB3 Type-A Port A1"" |
| 218 | register "type" = "UPC_TYPE_USB3_A" |
| 219 | register "group" = "ACPI_PLD_GROUP(1, 3)" |
| 220 | device usb 3.3 on end |
| 221 | end |
| 222 | chip drivers/usb/acpi |
| 223 | register "desc" = ""USB3 Type-A Port A2"" |
| 224 | register "type" = "UPC_TYPE_USB3_A" |
| 225 | register "group" = "ACPI_PLD_GROUP(1, 4)" |
| 226 | device usb 3.4 on end |
| 227 | end |
| 228 | chip drivers/usb/acpi |
| 229 | register "desc" = ""USB3 Type-A Port A3"" |
| 230 | register "type" = "UPC_TYPE_USB3_A" |
| 231 | register "group" = "ACPI_PLD_GROUP(1, 5)" |
| 232 | device usb 3.5 on end |
| 233 | end |
| 234 | end |
| 235 | end |
| 236 | end # USB xHCI |
| 237 | device pci 15.0 off end # I2C 0 |
| 238 | device pci 15.1 off end # I2C 1 |
| 239 | device pci 15.2 off end # I2C 2 |
| 240 | device pci 15.3 off end # I2C 3 |
| 241 | device pci 19.0 on |
| 242 | chip drivers/i2c/generic |
Sam McNally | ede68ac | 2023-02-15 20:16:55 +1100 | [diff] [blame] | 243 | register "hid" = ""RTL5682"" |
Liam Flaherty | 3dba47a | 2023-01-13 11:46:19 +1100 | [diff] [blame] | 244 | register "name" = ""RT58"" |
| 245 | register "desc" = ""Realtek RT5682"" |
| 246 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" |
| 247 | register "property_count" = "1" |
| 248 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 249 | register "property_list[0].name" = ""realtek,jd-src"" |
| 250 | register "property_list[0].integer" = "1" |
| 251 | device i2c 1a on end |
| 252 | end |
| 253 | end # I2C 4 |
| 254 | device pci 1c.2 on |
| 255 | chip drivers/net |
| 256 | register "customized_leds" = "0x05af" |
| 257 | register "wake" = "GPE0_DW0_03" # GPP_B3 |
| 258 | register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 259 | register "device_index" = "0" |
| 260 | device pci 00.0 on end |
| 261 | end |
| 262 | end # PCI Express Root Port 3 - RTL8111H LAN |
| 263 | device pci 1c.6 on |
| 264 | chip drivers/wifi/generic |
| 265 | register "wake" = "GPE0_DW2_03" |
| 266 | device pci 00.0 on end |
| 267 | end |
| 268 | end # PCI Express Root Port 7 - WLAN |
| 269 | device pci 1c.7 off end # PCI Express Root Port 8 |
Sam McNally | ede68ac | 2023-02-15 20:16:55 +1100 | [diff] [blame] | 270 | device pci 1f.3 on end # Intel HDA |
Liam Flaherty | c085856 | 2023-01-06 14:01:16 +1100 | [diff] [blame] | 271 | end |
| 272 | end |