Angel Pons | c3f58f6 | 2020-04-05 15:46:41 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 61cd57b | 2013-10-30 14:36:11 -0500 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
| 4 | #include <acpi/acpigen.h> |
Angel Pons | e0e2890 | 2020-08-03 13:26:21 +0200 | [diff] [blame] | 5 | #include <arch/ioapic.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 6 | #include <device/mmio.h> |
Aaron Durbin | 1af3663 | 2013-11-07 10:42:16 -0600 | [diff] [blame] | 7 | #include <arch/smp/mpspec.h> |
| 8 | #include <console/console.h> |
Aaron Durbin | 303525b | 2013-11-05 11:42:32 -0600 | [diff] [blame] | 9 | #include <cpu/x86/smm.h> |
Aaron Durbin | 61cd57b | 2013-10-30 14:36:11 -0500 | [diff] [blame] | 10 | #include <types.h> |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 11 | #include <cpu/x86/msr.h> |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 12 | #include <cpu/intel/turbo.h> |
Aaron Durbin | 61cd57b | 2013-10-30 14:36:11 -0500 | [diff] [blame] | 13 | |
Julius Werner | 18ea2d3 | 2014-10-07 16:42:17 -0700 | [diff] [blame] | 14 | #include <soc/acpi.h> |
| 15 | #include <soc/iomap.h> |
| 16 | #include <soc/irq.h> |
| 17 | #include <soc/msr.h> |
| 18 | #include <soc/pattrs.h> |
Angel Pons | b5320b2 | 2020-07-07 18:27:30 +0200 | [diff] [blame] | 19 | #include <soc/pm.h> |
Aaron Durbin | 61cd57b | 2013-10-30 14:36:11 -0500 | [diff] [blame] | 20 | |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 21 | #define MWAIT_RES(state, sub_state) \ |
| 22 | { \ |
| 23 | .addrl = (((state) << 4) | (sub_state)), \ |
| 24 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 25 | .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ |
| 26 | .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ |
| 27 | .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \ |
| 28 | } |
| 29 | |
| 30 | /* C-state map without S0ix */ |
| 31 | static acpi_cstate_t cstate_map[] = { |
| 32 | { |
| 33 | /* C1 */ |
| 34 | .ctype = 1, /* ACPI C1 */ |
| 35 | .latency = 1, |
| 36 | .power = 1000, |
| 37 | .resource = MWAIT_RES(0, 0), |
| 38 | }, |
| 39 | { |
| 40 | /* C6NS with no L2 shrink */ |
| 41 | /* NOTE: this substate is above CPUID limit */ |
| 42 | .ctype = 2, /* ACPI C2 */ |
| 43 | .latency = 500, |
| 44 | .power = 10, |
Duncan Laurie | 22f1dcd | 2013-12-02 10:14:47 -0800 | [diff] [blame] | 45 | .resource = MWAIT_RES(5, 1), |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 46 | }, |
| 47 | { |
| 48 | /* C6FS with full L2 shrink */ |
| 49 | .ctype = 3, /* ACPI C3 */ |
| 50 | .latency = 1500, /* 1.5ms worst case */ |
Aaron Durbin | 4177db5 | 2014-02-05 14:55:26 -0600 | [diff] [blame] | 51 | .power = 1, |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 52 | .resource = MWAIT_RES(5, 2), |
| 53 | } |
| 54 | }; |
| 55 | |
Angel Pons | 91ca2dd | 2020-07-12 14:24:48 +0200 | [diff] [blame] | 56 | int acpi_sci_irq(void) |
Aaron Durbin | 1af3663 | 2013-11-07 10:42:16 -0600 | [diff] [blame] | 57 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 58 | u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL); |
Aaron Durbin | 1af3663 | 2013-11-07 10:42:16 -0600 | [diff] [blame] | 59 | int scis; |
| 60 | static int sci_irq; |
| 61 | |
| 62 | if (sci_irq) |
| 63 | return sci_irq; |
| 64 | |
| 65 | /* Determine how SCI is routed. */ |
| 66 | scis = read32(actl) & SCIS_MASK; |
| 67 | switch (scis) { |
| 68 | case SCIS_IRQ9: |
| 69 | case SCIS_IRQ10: |
| 70 | case SCIS_IRQ11: |
| 71 | sci_irq = scis - SCIS_IRQ9 + 9; |
| 72 | break; |
| 73 | case SCIS_IRQ20: |
| 74 | case SCIS_IRQ21: |
| 75 | case SCIS_IRQ22: |
| 76 | case SCIS_IRQ23: |
| 77 | sci_irq = scis - SCIS_IRQ20 + 20; |
| 78 | break; |
| 79 | default: |
| 80 | printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n"); |
| 81 | sci_irq = 9; |
| 82 | break; |
| 83 | } |
| 84 | |
| 85 | printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq); |
| 86 | return sci_irq; |
| 87 | } |
| 88 | |
Angel Pons | e0e2890 | 2020-08-03 13:26:21 +0200 | [diff] [blame] | 89 | unsigned long acpi_fill_madt(unsigned long current) |
| 90 | { |
| 91 | /* Local APICs */ |
| 92 | current = acpi_create_madt_lapics(current); |
| 93 | |
| 94 | /* IOAPIC */ |
| 95 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 96 | 2, IO_APIC_ADDR, 0); |
| 97 | |
| 98 | current = acpi_madt_irq_overrides(current); |
| 99 | |
| 100 | return current; |
| 101 | } |
| 102 | |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 103 | static acpi_tstate_t soc_tss_table[] = { |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 104 | { 100, 1000, 0, 0x00, 0 }, |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 105 | { 88, 875, 0, 0x1e, 0 }, |
| 106 | { 75, 750, 0, 0x1c, 0 }, |
| 107 | { 63, 625, 0, 0x1a, 0 }, |
| 108 | { 50, 500, 0, 0x18, 0 }, |
| 109 | { 38, 375, 0, 0x16, 0 }, |
| 110 | { 25, 250, 0, 0x14, 0 }, |
| 111 | { 13, 125, 0, 0x12, 0 }, |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 112 | }; |
| 113 | |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 114 | static void generate_t_state_entries(int core, int cores_per_package) |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 115 | { |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 116 | /* Indicate SW_ALL coordination for T-states */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 117 | acpigen_write_TSD_package(core, cores_per_package, SW_ALL); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 118 | |
| 119 | /* Indicate FFixedHW so OS will use MSR */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 120 | acpigen_write_empty_PTC(); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 121 | |
| 122 | /* Set NVS controlled T-state limit */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 123 | acpigen_write_TPC("\\TLVL"); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 124 | |
| 125 | /* Write TSS table for MSR access */ |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 126 | acpigen_write_TSS_package(ARRAY_SIZE(soc_tss_table), soc_tss_table); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | static int calculate_power(int tdp, int p1_ratio, int ratio) |
| 130 | { |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 131 | u32 m, power; |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 132 | |
| 133 | /* |
| 134 | * M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2 |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 135 | */ |
| 136 | |
| 137 | m = (110000 - ((p1_ratio - ratio) * 625)) / 11; |
| 138 | m = (m * m) / 1000; |
| 139 | |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 140 | /* |
| 141 | * Power = (ratio / p1_ratio) * m * TDP |
| 142 | */ |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 143 | power = ((ratio * 100000 / p1_ratio) / 100); |
| 144 | power *= (m / 100) * (tdp / 1000); |
| 145 | power /= 1000; |
| 146 | |
| 147 | return (int)power; |
| 148 | } |
| 149 | |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 150 | static void generate_p_state_entries(int core, int cores_per_package) |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 151 | { |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 152 | int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; |
| 153 | int coord_type, power_max, power_unit, num_entries; |
| 154 | int ratio, power, clock, clock_max; |
| 155 | int vid, vid_turbo, vid_min, vid_max, vid_range_2; |
| 156 | u32 control_status; |
| 157 | const struct pattrs *pattrs = pattrs_get(); |
| 158 | msr_t msr; |
| 159 | |
| 160 | /* Inputs from CPU attributes */ |
| 161 | ratio_max = pattrs->iacore_ratios[IACORE_MAX]; |
| 162 | ratio_min = pattrs->iacore_ratios[IACORE_LFM]; |
| 163 | vid_max = pattrs->iacore_vids[IACORE_MAX]; |
| 164 | vid_min = pattrs->iacore_vids[IACORE_LFM]; |
| 165 | |
Aaron Durbin | 4177db5 | 2014-02-05 14:55:26 -0600 | [diff] [blame] | 166 | /* Set P-states coordination type based on MSR disable bit */ |
Duncan Laurie | 31ac9e3 | 2014-03-28 10:52:13 -0700 | [diff] [blame] | 167 | coord_type = (pattrs->num_cpus > 2) ? SW_ALL : HW_ALL; |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 168 | |
| 169 | /* Max Non-Turbo Frequency */ |
| 170 | clock_max = (ratio_max * pattrs->bclk_khz) / 1000; |
| 171 | |
| 172 | /* Calculate CPU TDP in mW */ |
| 173 | msr = rdmsr(MSR_PKG_POWER_SKU_UNIT); |
| 174 | power_unit = 1 << (msr.lo & 0xf); |
| 175 | msr = rdmsr(MSR_PKG_POWER_LIMIT); |
| 176 | power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; |
| 177 | |
| 178 | /* Write _PCT indicating use of FFixedHW */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 179 | acpigen_write_empty_PCT(); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 180 | |
Duncan Laurie | ad8d913 | 2013-12-10 07:41:33 -0800 | [diff] [blame] | 181 | /* Write _PPC with NVS specified limit on supported P-state */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 182 | acpigen_write_PPC_NVS(); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 183 | |
| 184 | /* Write PSD indicating configured coordination type */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 185 | acpigen_write_PSD_package(core, 1, coord_type); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 186 | |
| 187 | /* Add P-state entries in _PSS table */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 188 | acpigen_write_name("_PSS"); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 189 | |
| 190 | /* Determine ratio points */ |
| 191 | ratio_step = 1; |
| 192 | num_entries = (ratio_max - ratio_min) / ratio_step; |
| 193 | while (num_entries > 15) { /* ACPI max is 15 ratios */ |
| 194 | ratio_step <<= 1; |
| 195 | num_entries >>= 1; |
| 196 | } |
| 197 | |
| 198 | /* P[T] is Turbo state if enabled */ |
| 199 | if (get_turbo_state() == TURBO_ENABLED) { |
| 200 | /* _PSS package count including Turbo */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 201 | acpigen_write_package(num_entries + 2); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 202 | |
| 203 | ratio_turbo = pattrs->iacore_ratios[IACORE_TURBO]; |
| 204 | vid_turbo = pattrs->iacore_vids[IACORE_TURBO]; |
| 205 | control_status = (ratio_turbo << 8) | vid_turbo; |
| 206 | |
| 207 | /* Add entry for Turbo ratio */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 208 | acpigen_write_PSS_package( |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 209 | clock_max + 1, /* MHz */ |
| 210 | power_max, /* mW */ |
| 211 | 10, /* lat1 */ |
| 212 | 10, /* lat2 */ |
| 213 | control_status, /* control */ |
| 214 | control_status); /* status */ |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 215 | } else { |
| 216 | /* _PSS package count without Turbo */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 217 | acpigen_write_package(num_entries + 1); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 218 | ratio_turbo = ratio_max; |
| 219 | vid_turbo = vid_max; |
| 220 | } |
| 221 | |
| 222 | /* First regular entry is max non-turbo ratio */ |
| 223 | control_status = (ratio_max << 8) | vid_max; |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 224 | acpigen_write_PSS_package( |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 225 | clock_max, /* MHz */ |
| 226 | power_max, /* mW */ |
| 227 | 10, /* lat1 */ |
| 228 | 10, /* lat2 */ |
| 229 | control_status, /* control */ |
| 230 | control_status); /* status */ |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 231 | |
| 232 | /* Set up ratio and vid ranges for VID calculation */ |
| 233 | ratio_range_2 = (ratio_turbo - ratio_min) * 2; |
| 234 | vid_range_2 = (vid_turbo - vid_min) * 2; |
| 235 | |
| 236 | /* Generate the remaining entries */ |
| 237 | for (ratio = ratio_min + ((num_entries - 1) * ratio_step); |
| 238 | ratio >= ratio_min; ratio -= ratio_step) { |
| 239 | |
| 240 | /* Calculate VID for this ratio */ |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 241 | vid = ((ratio - ratio_min) * vid_range_2) / ratio_range_2 + vid_min; |
| 242 | |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 243 | /* Round up if remainder */ |
| 244 | if (((ratio - ratio_min) * vid_range_2) % ratio_range_2) |
| 245 | vid++; |
| 246 | |
| 247 | /* Calculate power at this ratio */ |
| 248 | power = calculate_power(power_max, ratio_max, ratio); |
| 249 | clock = (ratio * pattrs->bclk_khz) / 1000; |
| 250 | control_status = (ratio << 8) | (vid & 0xff); |
| 251 | |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 252 | acpigen_write_PSS_package( |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 253 | clock, /* MHz */ |
| 254 | power, /* mW */ |
| 255 | 10, /* lat1 */ |
| 256 | 10, /* lat2 */ |
| 257 | control_status, /* control */ |
| 258 | control_status); /* status */ |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 259 | } |
| 260 | |
| 261 | /* Fix package length */ |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 262 | acpigen_pop_len(); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 263 | } |
| 264 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 265 | void generate_cpu_entries(const struct device *device) |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 266 | { |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 267 | int core; |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 268 | const struct pattrs *pattrs = pattrs_get(); |
| 269 | |
Arthur Heymans | a783305 | 2018-11-28 12:20:14 +0100 | [diff] [blame] | 270 | for (core = 0; core < pattrs->num_cpus; core++) { |
Christian Walter | be3979c | 2019-12-18 15:07:59 +0100 | [diff] [blame] | 271 | /* Generate processor \_SB.CPUx */ |
Michael Niewöhner | 2353cd9 | 2021-10-04 16:59:49 +0200 | [diff] [blame] | 272 | acpigen_write_processor(core, 0, 0); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 273 | |
| 274 | /* Generate P-state tables */ |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 275 | generate_p_state_entries(core, pattrs->num_cpus); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 276 | |
| 277 | /* Generate C-state tables */ |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 278 | acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map)); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 279 | |
| 280 | /* Generate T-state tables */ |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 281 | generate_t_state_entries(core, pattrs->num_cpus); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 282 | |
Vladimir Serbinenko | 7fb149d | 2014-10-08 22:56:27 +0200 | [diff] [blame] | 283 | acpigen_pop_len(); |
Duncan Laurie | 8923be5 | 2013-11-05 13:02:30 -0800 | [diff] [blame] | 284 | } |
Arthur Heymans | a783305 | 2018-11-28 12:20:14 +0100 | [diff] [blame] | 285 | |
| 286 | /* PPKG is usually used for thermal management |
| 287 | of the first and only package. */ |
| 288 | acpigen_write_processor_package("PPKG", 0, pattrs->num_cpus); |
| 289 | |
| 290 | /* Add a method to notify processor nodes */ |
| 291 | acpigen_write_processor_cnot(pattrs->num_cpus); |
Aaron Durbin | 303525b | 2013-11-05 11:42:32 -0600 | [diff] [blame] | 292 | } |
Aaron Durbin | 1af3663 | 2013-11-07 10:42:16 -0600 | [diff] [blame] | 293 | |
| 294 | unsigned long acpi_madt_irq_overrides(unsigned long current) |
| 295 | { |
| 296 | int sci_irq = acpi_sci_irq(); |
| 297 | acpi_madt_irqoverride_t *irqovr; |
| 298 | uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL; |
| 299 | |
| 300 | /* INT_SRC_OVR */ |
| 301 | irqovr = (void *)current; |
| 302 | current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0); |
| 303 | |
| 304 | if (sci_irq >= 20) |
| 305 | sci_flags |= MP_IRQ_POLARITY_LOW; |
| 306 | else |
| 307 | sci_flags |= MP_IRQ_POLARITY_HIGH; |
| 308 | |
| 309 | irqovr = (void *)current; |
Angel Pons | 06e44a8 | 2020-07-07 17:34:21 +0200 | [diff] [blame] | 310 | current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags); |
Aaron Durbin | 1af3663 | 2013-11-07 10:42:16 -0600 | [diff] [blame] | 311 | |
| 312 | return current; |
| 313 | } |