blob: 715ec1bb4e94bbeb30549acfa7ba26a18cf2aed9 [file] [log] [blame]
ron minnichb44a3882024-03-03 21:21:55 +00001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/include/ "fu740-c000.dtsi"
4
5/ {
6 model = "SiFive HiFive Unmatched A00";
7 compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000", "sifive,fu740";
8
9 cpus {
10 //TODO replace with CLOCK_FREQUENCY macro that is used in both code and here to have a single source of truth
11 timebase-frequency = <1000000>;
12 };
13
14 memory@80000000 {
15 device_type = "memory";
16 reg = <0x0 0x80000000 0x4 0x00000000>;
17 };
18
19 hfclk: hfclk {
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <26000000>;
23 clock-output-names = "hfclk";
24 };
25
26 rtcclk: rtcclk {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <1000000>;
30 clock-output-names = "rtcclk";
31 };
32};
33
34&uart0 {
35 status = "okay";
36};
37
38&uart1 {
39 status = "okay";
40};
41
42&i2c0 {
43 status = "okay";
44
45 temperature-sensor@4c {
46 compatible = "ti,tmp451";
47 reg = <0x4c>;
48 vcc-supply = <&vdd_bpro>;
49 interrupt-parent = <&gpio>;
50 interrupts = <6 8>;
51 };
52
53 eeprom@54 {
54 compatible = "microchip,24c02", "atmel,24c02";
55 reg = <0x54>;
56 label = "board-id";
57 vcc-supply = <0x10>;
58 pagesize = <16>;
59 read-only;
60 size = <256>;
61 };
62
63 pmic@58 {
64 compatible = "dlg,da9063";
65 reg = <0x58>;
66 interrupt-parent = <&gpio>;
67 interrupts = <1 8>;
68 interrupt-controller;
69
70 onkey {
71 compatible = "dlg,da9063-onkey";
72 };
73
74 rtc {
75 compatible = "dlg,da9063-rtc";
76 };
77
78 watchdog {
79 compatible = "dlg,da9063-watchdog";
80 };
81
82 regulators {
83 vdd_bcore: bcores-merged {
84 regulator-min-microvolt = <1050000>;
85 regulator-max-microvolt = <1050000>;
86 regulator-min-microamp = <4800000>;
87 regulator-max-microamp = <4800000>;
88 regulator-always-on;
89 };
90
91 vdd_bpro: bpro {
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 regulator-min-microamp = <2400000>;
95 regulator-max-microamp = <2400000>;
96 regulator-always-on;
97 };
98
99 vdd_bperi: bperi {
100 regulator-min-microvolt = <1060000>;
101 regulator-max-microvolt = <1060000>;
102 regulator-min-microamp = <1500000>;
103 regulator-max-microamp = <1500000>;
104 regulator-always-on;
105 };
106
107 vdd_bmem_bio: bmem-bio-merged {
108 regulator-min-microvolt = <1200000>;
109 regulator-max-microvolt = <1200000>;
110 regulator-min-microamp = <3000000>;
111 regulator-max-microamp = <3000000>;
112 regulator-always-on;
113 };
114
115 vdd_ldo1: ldo1 {
116 regulator-min-microvolt = <1800000>;
117 regulator-max-microvolt = <1800000>;
118 regulator-always-on;
119 };
120
121 vdd_ldo2: ldo2 {
122 regulator-min-microvolt = <1800000>;
123 regulator-max-microvolt = <1800000>;
124 regulator-always-on;
125 };
126
127 vdd_ldo3: ldo3 {
128 regulator-min-microvolt = <3300000>;
129 regulator-max-microvolt = <3300000>;
130 regulator-always-on;
131 };
132
133 vdd_ldo4: ldo4 {
134 regulator-min-microvolt = <2500000>;
135 regulator-max-microvolt = <2500000>;
136 regulator-always-on;
137 };
138
139 vdd_ldo5: ldo5 {
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142 regulator-always-on;
143 };
144
145 vdd_ldo6: ldo6 {
146 regulator-min-microvolt = <1800000>;
147 regulator-max-microvolt = <1800000>;
148 regulator-always-on;
149 };
150
151 vdd_ldo7: ldo7 {
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
154 regulator-always-on;
155 };
156
157 vdd_ldo8: ldo8 {
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
160 regulator-always-on;
161 };
162
163 vdd_ld09: ldo9 {
164 regulator-min-microvolt = <1050000>;
165 regulator-max-microvolt = <1050000>;
166 regulator-always-on;
167 };
168
169 vdd_ldo10: ldo10 {
170 regulator-min-microvolt = <1000000>;
171 regulator-max-microvolt = <1000000>;
172 regulator-always-on;
173 };
174
175 vdd_ldo11: ldo11 {
176 regulator-min-microvolt = <2500000>;
177 regulator-max-microvolt = <2500000>;
178 regulator-always-on;
179 };
180 };
181 };
182
183};
184
185&qspi0 {
186 status = "okay";
187 flash@0 {
188 compatible = "jedec,spi-nor";
189 reg = <0>;
190 spi-max-frequency = <50000000>;
191 m25p,fast-read;
192 spi-tx-bus-width = <4>;
193 spi-rx-bus-width = <4>;
194 };
195};
196
197&spi0 {
198 status = "okay";
199 mmc@0 {
200 compatible = "mmc-spi-slot";
201 reg = <0>;
202 spi-max-frequency = <20000000>;
203 voltage-ranges = <3300 3300>;
204 disable-wp;
205 gpios = <0x11 0x0f 0x01>;
206 };
207};
208
209&eth0 {
210 status = "okay";
211 phy-mode = "gmii";
212 phy-handle = <&phy0>;
213 phy0: ethernet-phy@0 {
214 reg = <0>;
215 };
216};
217
218&pwm0 {
219 status = "okay";
220};
221
222&pwm1 {
223 status = "okay";
224};
225
226&gpio {
227 status = "okay";
228 gpio-line-names = "J29.1", "PMICNTB", "PMICSHDN", "J8.1", "J8.3",
229 "PCIe_PWREN", "THERM", "UBRDG_RSTN", "PCIe_PERSTN",
230 "ULPI_RSTN", "J8.2", "UHUB_RSTN", "GEMGXL_RST", "J8.4",
231 "EN_VDD_SD", "SD_CD";
232};