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Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -08001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -08005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9
10 # Enable Panel as LVDS and configure power delays
11 register "gpu_panel_port_select" = "0" # LVDS
12 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
13 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
14 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
15 register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
16 register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
17
Matt DeVilliere2c4a352019-01-10 12:51:56 -060018 # Set backlight PWM values
19 register "gpu_cpu_backlight" = "0x000001e8"
20 register "gpu_pch_backlight" = "0x03d00000"
21
Alexandru Gagniuc83b05eb2015-02-15 14:09:21 -060022 register "max_mem_clock_mhz" = "666" # DDR3-1333
23
Stefan Reinauer0aa37c42013-02-12 15:20:54 -080024 device cpu_cluster 0 on
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080025 chip cpu/intel/socket_rPGA989
26 device lapic 0 on end
27 end
28 chip cpu/intel/model_206ax
29 # Magic APIC ID to locate this chip
Arthur Heymansb3f23232019-01-21 17:48:55 +010030 device lapic 0xacac off end
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080031
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080032 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
33 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
34 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
35
36 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
37 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
38 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
39 end
40 end
41
Stefan Reinauer4aff4452013-02-12 14:17:15 -080042 device domain 0 on
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080043 device pci 00.0 on end # host bridge
44 device pci 01.0 off end # PCIe Bridge for discrete graphics
45 device pci 02.0 on end # vga controller
46
47 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080048 # GPI routing
49 # 0 No effect (default)
50 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
51 # 2 SCI (if corresponding GPIO_EN bit is also set)
52 register "alt_gp_smi_en" = "0x0000"
53 #register "gpi1_routing" = "1" #SMI from EC
54 register "gpi13_routing" = "2" #SCI from EC
55
Shawn Nematbakhsh7b8952c2013-03-14 11:03:59 -070056 # Enable SATA ports 0 & 1
57 register "sata_port_map" = "0x3"
58 # Set max SATA speed to 3.0 Gb/s
59 register "sata_interface_speed_support" = "0x2"
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080060
61 # Enable EC Port 0x68/0x6C
62 register "gen1_dec" = "0x00040069"
63
64 # EC range is 0x380-0387
65 register "gen2_dec" = "0x00040381"
66
67 # Enable zero-based linear PCIe root port functions
68 register "pcie_port_coalesce" = "1"
69
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020070 register "c2_latency" = "101" # c2 not supported
71 register "p_cnt_throttling_supported" = "1"
72
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080073 device pci 14.0 on end # USB 3.0 Controller
74 device pci 16.0 on end # Management Engine Interface 1
75 device pci 16.1 off end # Management Engine Interface 2
76 device pci 16.2 off end # Management Engine IDE-R
77 device pci 16.3 off end # Management Engine KT
78 device pci 19.0 off end # Intel Gigabit Ethernet
79 device pci 1a.0 on end # USB2 EHCI #2
80 device pci 1b.0 on end # High Definition Audio
81 device pci 1c.0 on end # PCIe Port #1 (mini PCIe Slot - WLAN & Serial debug)
82 device pci 1c.1 on end # PCIe Port #2 (ETH0)
83 device pci 1c.2 on end # PCIe Port #3 (Card Reader)
84 #force ASPM for PCIe bridge to Card Reader
85 register "pcie_aspm_f2" = "0x3"
86 device pci 1c.3 off end # PCIe Port #4
87 device pci 1c.4 off end # PCIe Port #5
88 device pci 1c.5 off end # PCIe Port #6
89 device pci 1c.6 off end # PCIe Port #7
90 device pci 1c.7 off end # PCIe Port #8
91 device pci 1d.0 on end # USB2 EHCI #1
92 device pci 1e.0 off end # PCI bridge
93 device pci 1f.0 on #LPC bridge
Matt DeVillier3044af72018-08-01 13:05:14 -050094 chip drivers/pc80/tpm
95 device pnp 0c31.0 on end
96 end
Stefan Reinauerd7bd4eb2013-02-11 11:11:36 -080097 chip ec/quanta/ene_kb3940q
98 # 60/64 KBC
99 device pnp ff.1 on # dummy address
100 end
101 end
102 end # LPC bridge
103 device pci 1f.2 on end # SATA Controller 1
104 device pci 1f.3 on end # SMBus
105 device pci 1f.5 off end # SATA Controller 2
106 device pci 1f.6 on end # Thermal
107 end
108 end
109end