blob: 5b3e2ea6a63aca29dba285e01f17e683651bdf84 [file] [log] [blame]
amanda_hwangb3b47e12018-03-08 11:04:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2018 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <chip.h>
17#include <device/device.h>
18#include <ec/google/chromeec/ec.h>
19#include <baseboard/variants.h>
20
21#define SKU_UNKNOWN 0xFFFF
22#define SKU_0_NAMI 0x3A7B
23#define SKU_1_VAYNE 0x3A63
24#define SKU_2_VAYNE 0x3A7F
25
26static uint16_t board_sku_id(void)
27{
28 static int sku_id = -1;
29 uint32_t id;
30 if (sku_id >= 0)
31 return sku_id;
32 if (google_chromeec_cbi_get_sku_id(&id))
33 return SKU_UNKNOWN;
34 sku_id = id;
35 return sku_id;
36}
37
38void variant_devtree_update(void)
39{
40 /* Override dev tree settings per board */
41 uint16_t sku_id = board_sku_id();
42 device_t root = SA_DEV_ROOT;
43 config_t *cfg = root->chip_info;
44 switch (sku_id) {
45 case SKU_1_VAYNE:
46 cfg->usb2_ports[5].enable = 0;//rear camera
47 break;
48 default:
49 break;
50 }
51}