Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 AMD |
| 5 | * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
Kyösti Mälkki | 7362768 | 2019-03-02 20:16:23 +0200 | [diff] [blame] | 18 | #include <arch/io.h> |
| 19 | |
Stefan Reinauer | d55e26f | 2010-04-25 13:54:30 +0000 | [diff] [blame] | 20 | #ifdef UNUSED_CODE |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 21 | int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val); |
Myles Watson | ad894c5 | 2010-04-30 17:11:03 +0000 | [diff] [blame] | 22 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 23 | static int set_ht_link_mcp55(u8 ht_c_num) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 24 | { |
| 25 | unsigned vendorid = 0x10de; |
| 26 | unsigned val = 0x01610109; |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 27 | /* NVIDIA MCP55 hardcode, hardware can not set it automatically. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 28 | return set_ht_link_buffer_counts_chain(ht_c_num, vendorid, val); |
| 29 | } |
| 30 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 31 | static void setup_ss_table(unsigned index, unsigned where, unsigned control, |
| 32 | const unsigned int *register_values, int max) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 33 | { |
| 34 | int i; |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 35 | unsigned val; |
| 36 | |
| 37 | val = inl(control); |
| 38 | val &= 0xfffffffe; |
| 39 | outl(val, control); |
| 40 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 41 | outl(0, index); /* Index */ |
| 42 | for (i = 0; i < max; i++) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 43 | unsigned long reg; |
| 44 | reg = register_values[i]; |
| 45 | outl(reg, where); |
| 46 | } |
| 47 | |
| 48 | val = inl(control); |
| 49 | val |= 1; |
| 50 | outl(val, control); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 51 | } |
Stefan Reinauer | d55e26f | 2010-04-25 13:54:30 +0000 | [diff] [blame] | 52 | #endif |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 53 | |
| 54 | /* SIZE 0x100 */ |
| 55 | #define ANACTRL_IO_BASE 0x2800 |
| 56 | #define ANACTRL_REG_POS 0x68 |
| 57 | |
| 58 | /* SIZE 0x100 */ |
| 59 | #define SYSCTRL_IO_BASE 0x2400 |
| 60 | #define SYSCTRL_REG_POS 0x64 |
| 61 | |
| 62 | /* SIZE 0x100 */ |
| 63 | #define ACPICTRL_IO_BASE 0x2000 |
| 64 | #define ACPICTRL_REG_POS 0x60 |
| 65 | |
| 66 | /* |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 67 | * 16 1 1 1 1 8 :0 |
| 68 | * 16 0 4 0 0 8 :1 |
| 69 | * 16 0 4 2 2 4 :2 |
| 70 | * 4 4 4 4 4 8 :3 |
| 71 | * 8 8 4 0 0 8 :4 |
| 72 | * 8 0 4 4 4 8 :5 |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 73 | */ |
| 74 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 75 | #define MCP55_CHIP_REV 3 |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 76 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 77 | /* There will be implicit offsets applied, the writes below do not |
| 78 | * really happen at the PCI_ADDR() this expands to. |
| 79 | */ |
| 80 | #define MCP55_DEV(d, f, r) PCI_ADDR(0, d, f, r) |
| 81 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 82 | static void mcp55_early_set_port(unsigned mcp55_num, unsigned *busn, |
| 83 | unsigned *devn, unsigned *io_base) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 84 | { |
| 85 | |
| 86 | static const unsigned int ctrl_devport_conf[] = { |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 87 | MCP55_DEV(1, 1, ANACTRL_REG_POS), ~(0x0000ff00), ANACTRL_IO_BASE, |
| 88 | MCP55_DEV(1, 1, SYSCTRL_REG_POS), ~(0x0000ff00), SYSCTRL_IO_BASE, |
| 89 | MCP55_DEV(1, 1, ACPICTRL_REG_POS), ~(0x0000ff00), ACPICTRL_IO_BASE, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | int j; |
Elyes HAOUAS | 64e091f | 2018-04-26 22:16:42 +0200 | [diff] [blame] | 93 | for (j = 0; j < mcp55_num; j++) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 94 | setup_resource_map_offset(ctrl_devport_conf, |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 95 | ARRAY_SIZE(ctrl_devport_conf), |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 96 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 97 | } |
| 98 | } |
| 99 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 100 | static void mcp55_early_clear_port(unsigned mcp55_num, unsigned *busn, |
| 101 | unsigned *devn, unsigned *io_base) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 102 | { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 103 | static const unsigned int ctrl_devport_conf_clear[] = { |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 104 | MCP55_DEV(1, 1, ANACTRL_REG_POS), ~(0x0000ff00), 0, |
| 105 | MCP55_DEV(1, 1, SYSCTRL_REG_POS), ~(0x0000ff00), 0, |
| 106 | MCP55_DEV(1, 1, ACPICTRL_REG_POS), ~(0x0000ff00), 0, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 107 | }; |
| 108 | |
| 109 | int j; |
Elyes HAOUAS | 64e091f | 2018-04-26 22:16:42 +0200 | [diff] [blame] | 110 | for (j = 0; j < mcp55_num; j++) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 111 | setup_resource_map_offset(ctrl_devport_conf_clear, |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 112 | ARRAY_SIZE(ctrl_devport_conf_clear), |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 113 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 114 | } |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 115 | } |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 116 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 117 | static void mcp55_early_pcie_setup(unsigned busnx, unsigned devnx, |
| 118 | unsigned anactrl_io_base, unsigned pci_e_x) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 119 | { |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 120 | u32 tgio_ctrl, pll_ctrl, dword; |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 121 | int i; |
Antonello Dettori | 8126daf | 2016-09-03 10:45:33 +0200 | [diff] [blame] | 122 | pci_devfn_t dev; |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 123 | |
| 124 | dev = PCI_DEV(busnx, devnx + 1, 1); |
| 125 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 126 | dword = pci_read_config32(dev, 0xe4); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 127 | dword |= 0x3f0; /* Disable it at first. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 128 | pci_write_config32(dev, 0xe4, dword); |
| 129 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 130 | for (i = 0; i < 3; i++) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 131 | tgio_ctrl = inl(anactrl_io_base + 0xcc); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 132 | tgio_ctrl &= ~(3 << 9); |
| 133 | tgio_ctrl |= (i << 9); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 134 | outl(tgio_ctrl, anactrl_io_base + 0xcc); |
| 135 | pll_ctrl = inl(anactrl_io_base + 0x30); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 136 | pll_ctrl |= (1 << 31); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 137 | outl(pll_ctrl, anactrl_io_base + 0x30); |
| 138 | do { |
| 139 | pll_ctrl = inl(anactrl_io_base + 0x30); |
| 140 | } while (!(pll_ctrl & 1)); |
| 141 | } |
| 142 | tgio_ctrl = inl(anactrl_io_base + 0xcc); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 143 | tgio_ctrl &= ~((7 << 4) | (1 << 8)); |
| 144 | tgio_ctrl |= (pci_e_x << 4) | (1 << 8); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 145 | outl(tgio_ctrl, anactrl_io_base + 0xcc); |
| 146 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 147 | udelay(100); /* Wait 100us. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 148 | |
| 149 | dword = pci_read_config32(dev, 0xe4); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 150 | dword &= ~(0x3f0); /* Enable. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 151 | pci_write_config32(dev, 0xe4, dword); |
| 152 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 153 | mdelay(100); /* Need to wait 100ms. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 154 | } |
| 155 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 156 | static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, |
| 157 | unsigned *devn, unsigned *io_base, |
| 158 | unsigned *pci_e_x) |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 159 | { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 160 | static const unsigned int ctrl_conf_1[] = { |
| 161 | RES_PORT_IO_32, ACPICTRL_IO_BASE + 0x10, 0x0007ffff, 0xff78000, |
| 162 | RES_PORT_IO_32, ACPICTRL_IO_BASE + 0xa4, 0xffedffff, 0x0012000, |
| 163 | RES_PORT_IO_32, ACPICTRL_IO_BASE + 0xac, 0xfffffdff, 0x0000200, |
| 164 | RES_PORT_IO_32, ACPICTRL_IO_BASE + 0xb4, 0xfffffffd, 0x0000002, |
| 165 | |
| 166 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x24, 0xc0f0f08f, 0x26020230, |
| 167 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x34, 0x00000000, 0x22222222, |
| 168 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x08, 0x7FFFFFFF, 0x00000000, |
| 169 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x2C, 0x7FFFFFFF, 0x80000000, |
| 170 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0xCC, 0xFFFFF9FF, 0x00000000, |
| 171 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x30, 0x8FFFFFFF, 0x40000000, |
| 172 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0xCC, 0xFFFFF9FF, 0x00000200, |
| 173 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x30, 0x8FFFFFFF, 0x40000000, |
| 174 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0xCC, 0xFFFFF9FF, 0x00000400, |
| 175 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x30, 0x8FFFFFFF, 0x40000000, |
| 176 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x74, 0xFFFF0FF5, 0x0000F000, |
| 177 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x78, 0xFF00FF00, 0x00100010, |
| 178 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x7C, 0xFF0FF0FF, 0x00500500, |
| 179 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x80, 0xFFFFFFE7, 0x00000000, |
| 180 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x60, 0xFFCFFFFF, 0x00300000, |
| 181 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x90, 0xFFFF00FF, 0x0000FF00, |
| 182 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x9C, 0xFF00FFFF, 0x00070000, |
| 183 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 184 | RES_PCI_IO, MCP55_DEV(0, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 185 | RES_PCI_IO, MCP55_DEV(0, 0, 0x48), 0xFFFFDCED, 0x00002002, |
| 186 | RES_PCI_IO, MCP55_DEV(0, 0, 0x78), 0xFFFFFF8E, 0x00000011, |
| 187 | RES_PCI_IO, MCP55_DEV(0, 0, 0x80), 0xFFFF0000, 0x00009923, |
| 188 | RES_PCI_IO, MCP55_DEV(0, 0, 0x88), 0xFFFFFFFE, 0x00000000, |
| 189 | RES_PCI_IO, MCP55_DEV(0, 0, 0x8C), 0xFFFF0000, 0x0000007F, |
| 190 | RES_PCI_IO, MCP55_DEV(0, 0, 0xDC), 0xFFFEFFFF, 0x00010000, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 191 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 192 | RES_PCI_IO, MCP55_DEV(1, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 193 | RES_PCI_IO, MCP55_DEV(1, 0, 0x74), 0xFFFFFF7B, 0x00000084, |
| 194 | RES_PCI_IO, MCP55_DEV(1, 0, 0xF8), 0xFFFFFFCF, 0x00000010, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 195 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 196 | RES_PCI_IO, MCP55_DEV(1, 1, 0xC4), 0xFFFFFFFE, 0x00000001, |
| 197 | RES_PCI_IO, MCP55_DEV(1, 1, 0xF0), 0x7FFFFFFD, 0x00000002, |
| 198 | RES_PCI_IO, MCP55_DEV(1, 1, 0xF8), 0xFFFFFFCF, 0x00000010, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 199 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 200 | RES_PCI_IO, MCP55_DEV(8, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 201 | RES_PCI_IO, MCP55_DEV(8, 0, 0x68), 0xFFFFFF00, 0x000000FF, |
| 202 | RES_PCI_IO, MCP55_DEV(8, 0, 0xF8), 0xFFFFFFBF, 0x00000040, /* Enable bridge mode. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 203 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 204 | RES_PCI_IO, MCP55_DEV(9, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 205 | RES_PCI_IO, MCP55_DEV(9, 0, 0x68), 0xFFFFFF00, 0x000000FF, |
| 206 | RES_PCI_IO, MCP55_DEV(9, 0, 0xF8), 0xFFFFFFBF, 0x00000040, /* Enable bridge mode. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 207 | }; |
| 208 | |
| 209 | static const unsigned int ctrl_conf_1_1[] = { |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 210 | RES_PCI_IO, MCP55_DEV(5, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 211 | RES_PCI_IO, MCP55_DEV(5, 0, 0x50), 0xFFFFFFFC, 0x00000003, |
| 212 | RES_PCI_IO, MCP55_DEV(5, 0, 0x64), 0xFFFFFFFE, 0x00000001, |
| 213 | RES_PCI_IO, MCP55_DEV(5, 0, 0x70), 0xFFF0FFFF, 0x00040000, |
| 214 | RES_PCI_IO, MCP55_DEV(5, 0, 0xAC), 0xFFFFF0FF, 0x00000100, |
| 215 | RES_PCI_IO, MCP55_DEV(5, 0, 0x7C), 0xFFFFFFEF, 0x00000000, |
| 216 | RES_PCI_IO, MCP55_DEV(5, 0, 0xC8), 0xFF00FF00, 0x000A000A, |
| 217 | RES_PCI_IO, MCP55_DEV(5, 0, 0xD0), 0xF0FFFFFF, 0x03000000, |
| 218 | RES_PCI_IO, MCP55_DEV(5, 0, 0xE0), 0xF0FFFFFF, 0x03000000, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 219 | }; |
| 220 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 221 | static const unsigned int ctrl_conf_mcp55_only[] = { |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 222 | RES_PCI_IO, MCP55_DEV(1, 1, 0x40), 0x00000000, 0xCB8410DE, |
| 223 | RES_PCI_IO, MCP55_DEV(1, 1, 0xE0), 0xFFFFFEFF, 0x00000000, |
| 224 | RES_PCI_IO, MCP55_DEV(1, 1, 0xE4), 0xFFFFFFFB, 0x00000000, |
| 225 | RES_PCI_IO, MCP55_DEV(1, 1, 0xE8), 0xFFA9C8FF, 0x00003000, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 226 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 227 | RES_PCI_IO, MCP55_DEV(4, 0, 0x40), 0x00000000, 0xCB8410DE, |
| 228 | RES_PCI_IO, MCP55_DEV(4, 0, 0xF8), 0xFFFFFFCF, 0x00000010, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 229 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 230 | RES_PCI_IO, MCP55_DEV(2, 0, 0x40), 0x00000000, 0xCB8410DE, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 231 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 232 | RES_PCI_IO, MCP55_DEV(2, 1, 0x40), 0x00000000, 0xCB8410DE, |
| 233 | RES_PCI_IO, MCP55_DEV(2, 1, 0x64), 0xF87FFFFF, 0x05000000, |
| 234 | RES_PCI_IO, MCP55_DEV(2, 1, 0x78), 0xFFC07FFF, 0x00360000, |
| 235 | RES_PCI_IO, MCP55_DEV(2, 1, 0x68), 0xFE00D03F, 0x013F2C00, |
| 236 | RES_PCI_IO, MCP55_DEV(2, 1, 0x70), 0xFFF7FFFF, 0x00080000, |
| 237 | RES_PCI_IO, MCP55_DEV(2, 1, 0x7C), 0xFFFFF00F, 0x00000570, |
| 238 | RES_PCI_IO, MCP55_DEV(2, 1, 0xF8), 0xFFFFFFCF, 0x00000010, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 239 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 240 | RES_PCI_IO, MCP55_DEV(6, 0, 0x04), 0xFFFFFEFB, 0x00000104, |
| 241 | RES_PCI_IO, MCP55_DEV(6, 0, 0x3C), 0xF5FFFFFF, 0x0A000000, |
| 242 | RES_PCI_IO, MCP55_DEV(6, 0, 0x40), 0x00C8FFFF, 0x07330000, |
| 243 | RES_PCI_IO, MCP55_DEV(6, 0, 0x48), 0xFFFFFFF8, 0x00000005, |
| 244 | RES_PCI_IO, MCP55_DEV(6, 0, 0x4C), 0xFE02FFFF, 0x004C0000, |
| 245 | RES_PCI_IO, MCP55_DEV(6, 0, 0x74), 0xFFFFFFC0, 0x00000000, |
| 246 | RES_PCI_IO, MCP55_DEV(6, 0, 0xC0), 0x00000000, 0xCB8410DE, |
| 247 | RES_PCI_IO, MCP55_DEV(6, 0, 0xC4), 0xFFFFFFF8, 0x00000007, |
Jonathan A. Kollasch | acba73a | 2015-07-20 09:51:34 -0500 | [diff] [blame] | 248 | #if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10) |
| 249 | /* |
| 250 | * Avoid crash (complete with severe memory corruption!) during initial CAR boot |
| 251 | * in mcp55_early_setup_x() on Fam10h systems by not touching 0x78. |
| 252 | * Interestingly once the system is fully booted into Linux this can be set, but |
| 253 | * not before! Apparently something isn't initialized but the amount of effort |
| 254 | * required to fix this is non-negligible and of unknown real-world benefit |
| 255 | */ |
| 256 | #else |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 257 | RES_PCI_IO, MCP55_DEV(1, 0, 0x78), 0xC0FFFFFF, 0x19000000, |
Jonathan A. Kollasch | acba73a | 2015-07-20 09:51:34 -0500 | [diff] [blame] | 258 | #endif |
Uwe Hermann | f845e02 | 2007-09-25 01:31:35 +0000 | [diff] [blame] | 259 | |
Martin Roth | 1858d6a | 2017-06-24 21:30:42 -0600 | [diff] [blame] | 260 | #if IS_ENABLED(CONFIG_MCP55_USE_AZA) |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 261 | RES_PCI_IO, MCP55_DEV(6, 1, 0x40), 0x00000000, 0xCB8410DE, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 262 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 263 | #endif |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 264 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 265 | #ifdef MCP55_MB_SETUP |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 266 | /* Play a while with GPIO in MCP55. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 267 | MCP55_MB_SETUP |
| 268 | #endif |
| 269 | |
Martin Roth | 1858d6a | 2017-06-24 21:30:42 -0600 | [diff] [blame] | 270 | #if IS_ENABLED(CONFIG_MCP55_USE_AZA) |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 271 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 21, ~(3 << 2), (2 << 2), |
| 272 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 22, ~(3 << 2), (2 << 2), |
| 273 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 46, ~(3 << 2), (2 << 2), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 274 | #endif |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | static const unsigned int ctrl_conf_master_only[] = { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 278 | RES_PORT_IO_32, ACPICTRL_IO_BASE + 0x80, 0xEFFFFFF, 0x01000000, |
| 279 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 280 | /* Master MCP55???? YHLU */ |
| 281 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 0, ~(3 << 2), (0 << 2), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 282 | }; |
| 283 | |
| 284 | static const unsigned int ctrl_conf_2[] = { |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 285 | /* I didn't put PCI-E related stuff here. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 286 | |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 287 | RES_PCI_IO, MCP55_DEV(0, 0, 0x74), 0xFFFFF00F, 0x000009D0, |
| 288 | RES_PCI_IO, MCP55_DEV(1, 0, 0x74), 0xFFFF7FFF, 0x00008000, |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 289 | |
| 290 | RES_PORT_IO_32, SYSCTRL_IO_BASE + 0x48, 0xFFFEFFFF, 0x00010000, |
| 291 | |
| 292 | RES_PORT_IO_32, ANACTRL_IO_BASE + 0x60, 0xFFFFFF00, 0x00000012, |
| 293 | |
Martin Roth | 1858d6a | 2017-06-24 21:30:42 -0600 | [diff] [blame] | 294 | #if IS_ENABLED(CONFIG_MCP55_USE_NIC) |
Kyösti Mälkki | 9341566 | 2019-01-05 14:34:55 +0200 | [diff] [blame] | 295 | RES_PCI_IO, MCP55_DEV(1, 1, 0xe4), ~((1 << 22) | (1 << 20)), (1 << 22) | (1 << 20), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 296 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 297 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 4, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)), |
| 298 | RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 4, ~(0xff), ((0 << 4) | (1 << 2) | (1 << 0)), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 299 | #endif |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 300 | }; |
| 301 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 302 | int j, i; |
| 303 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 304 | for (j = 0; j < mcp55_num; j++) { |
| 305 | mcp55_early_pcie_setup(busn[j], devn[j], |
| 306 | io_base[j] + ANACTRL_IO_BASE, pci_e_x[j]); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 307 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 308 | setup_resource_map_x_offset(ctrl_conf_1, |
| 309 | ARRAY_SIZE(ctrl_conf_1), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 310 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 311 | |
| 312 | for (i = 0; i < 3; i++) { /* Three SATA */ |
| 313 | setup_resource_map_x_offset(ctrl_conf_1_1, |
| 314 | ARRAY_SIZE(ctrl_conf_1_1), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 315 | PCI_DEV(busn[j], devn[j], i), io_base[j]); |
| 316 | } |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 317 | |
| 318 | if (busn[j] == 0) { |
| 319 | setup_resource_map_x_offset(ctrl_conf_mcp55_only, |
| 320 | ARRAY_SIZE(ctrl_conf_mcp55_only), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 321 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
| 322 | } |
| 323 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 324 | if ((busn[j] == 0) && (mcp55_num>1)) { |
| 325 | setup_resource_map_x_offset(ctrl_conf_master_only, |
| 326 | ARRAY_SIZE(ctrl_conf_master_only), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 327 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
| 328 | } |
| 329 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 330 | setup_resource_map_x_offset(ctrl_conf_2, |
| 331 | ARRAY_SIZE(ctrl_conf_2), |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 332 | PCI_DEV(busn[j], devn[j], 0), io_base[j]); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 333 | } |
| 334 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | #ifndef HT_CHAIN_NUM_MAX |
| 338 | |
| 339 | #define HT_CHAIN_NUM_MAX 4 |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 340 | #define HT_CHAIN_BUSN_D 0x40 |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 341 | #define HT_CHAIN_IOBASE_D 0x4000 |
| 342 | |
| 343 | #endif |
| 344 | |
| 345 | static int mcp55_early_setup_x(void) |
| 346 | { |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 347 | /* Find out how many MCP55 we have. */ |
Scott Duplichan | 45057d2 | 2010-10-26 05:26:01 +0000 | [diff] [blame] | 348 | unsigned busn[HT_CHAIN_NUM_MAX] = {0}; |
| 349 | unsigned devn[HT_CHAIN_NUM_MAX] = {0}; |
| 350 | unsigned io_base[HT_CHAIN_NUM_MAX] = {0}; |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 351 | |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 352 | /* |
| 353 | * FIXME: May have problem if there is different MCP55 HTX card with |
| 354 | * different PCI_E lane allocation. Need to use same trick about |
| 355 | * pci1234 to verify node/link connection. |
| 356 | */ |
| 357 | unsigned pci_e_x[HT_CHAIN_NUM_MAX] = { |
| 358 | CONFIG_MCP55_PCI_E_X_0, CONFIG_MCP55_PCI_E_X_1, |
| 359 | CONFIG_MCP55_PCI_E_X_2, CONFIG_MCP55_PCI_E_X_3, |
| 360 | }; |
| 361 | int mcp55_num = 0, ht_c_index; |
| 362 | unsigned busnx, devnx; |
| 363 | |
| 364 | /* FIXME: Multi PCI segment handling. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 365 | |
| 366 | /* Any system that only have IO55 without MCP55? */ |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 367 | for (ht_c_index = 0; ht_c_index < HT_CHAIN_NUM_MAX; ht_c_index++) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 368 | busnx = ht_c_index * HT_CHAIN_BUSN_D; |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 369 | for (devnx = 0; devnx < 0x20; devnx++) { |
| 370 | u32 id; |
Antonello Dettori | 8126daf | 2016-09-03 10:45:33 +0200 | [diff] [blame] | 371 | pci_devfn_t dev; |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 372 | dev = PCI_DEV(busnx, devnx, 0); |
| 373 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 374 | if (id == 0x036910de) { |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 375 | busn[mcp55_num] = busnx; |
| 376 | devn[mcp55_num] = devnx; |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 377 | |
| 378 | /* We may have HT chain other than MCP55. */ |
| 379 | io_base[mcp55_num] |
| 380 | = ht_c_index * HT_CHAIN_IOBASE_D; |
| 381 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 382 | mcp55_num++; |
Uwe Hermann | c7f0c8f | 2011-01-04 19:51:33 +0000 | [diff] [blame] | 383 | if (mcp55_num == CONFIG_MCP55_NUM) |
| 384 | goto out; |
| 385 | break; /* Only one MCP55 on one chain. */ |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 386 | } |
| 387 | } |
| 388 | } |
| 389 | |
| 390 | out: |
Stefan Reinauer | 5ab52dd | 2015-01-05 13:01:01 -0800 | [diff] [blame] | 391 | printk(BIOS_DEBUG, "mcp55_num: %02x\n", mcp55_num); |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 392 | |
| 393 | mcp55_early_set_port(mcp55_num, busn, devn, io_base); |
| 394 | mcp55_early_setup(mcp55_num, busn, devn, io_base, pci_e_x); |
| 395 | |
| 396 | mcp55_early_clear_port(mcp55_num, busn, devn, io_base); |
| 397 | |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 398 | return 0; |
Yinghai Lu | c65bd56 | 2007-02-01 00:10:05 +0000 | [diff] [blame] | 399 | } |