huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 MediaTek Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
Julius Werner | 314b5c3 | 2019-02-20 17:50:42 -0800 | [diff] [blame] | 16 | #include <bootmem.h> |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 17 | #include <bootmode.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 18 | #include <console/console.h> |
| 19 | #include <device/device.h> |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 20 | #include <soc/addressmap.h> |
Julius Werner | 7f96589 | 2016-08-29 15:07:58 -0700 | [diff] [blame] | 21 | #include <soc/clock.h> |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 22 | #include <soc/display.h> |
Lin Huang | f00af58 | 2016-11-15 11:40:58 +0800 | [diff] [blame] | 23 | #include <soc/sdram.h> |
Julius Werner | 314b5c3 | 2019-02-20 17:50:42 -0800 | [diff] [blame] | 24 | #include <soc/symbols.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 25 | #include <stddef.h> |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 26 | #include <stdlib.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 27 | #include <string.h> |
| 28 | #include <symbols.h> |
Xing Zheng | 53d6d84 | 2016-12-06 17:12:21 +0800 | [diff] [blame] | 29 | #include <arm-trusted-firmware/plat/rockchip/rk3399/include/shared/bl31_param.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 30 | |
Julius Werner | 314b5c3 | 2019-02-20 17:50:42 -0800 | [diff] [blame] | 31 | void bootmem_platform_add_ranges(void) |
| 32 | { |
Julius Werner | 7e0dea6 | 2019-02-20 18:39:22 -0800 | [diff] [blame] | 33 | bootmem_add_range((uintptr_t)_pmu_sram, REGION_SIZE(pmu_sram), |
| 34 | BM_MEM_BL31); |
| 35 | bootmem_add_range((uintptr_t)_bl31_sram, REGION_SIZE(bl31_sram), |
| 36 | BM_MEM_BL31); |
Julius Werner | 314b5c3 | 2019-02-20 17:50:42 -0800 | [diff] [blame] | 37 | } |
| 38 | |
Elyes HAOUAS | f3ca88b | 2018-05-25 09:52:45 +0200 | [diff] [blame] | 39 | static void soc_read_resources(struct device *dev) |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 40 | { |
Lin Huang | f00af58 | 2016-11-15 11:40:58 +0800 | [diff] [blame] | 41 | ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size_mb() * KiB); |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 42 | } |
| 43 | |
Elyes HAOUAS | f3ca88b | 2018-05-25 09:52:45 +0200 | [diff] [blame] | 44 | static void soc_init(struct device *dev) |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 45 | { |
Xing Zheng | 53d6d84 | 2016-12-06 17:12:21 +0800 | [diff] [blame] | 46 | /* |
| 47 | * Reserve the whole TZRAM area because it will be marked as secure-only |
| 48 | * by BL31 and can not be accessed by the non-secure kernel. |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 49 | */ |
Xing Zheng | 53d6d84 | 2016-12-06 17:12:21 +0800 | [diff] [blame] | 50 | mmio_resource(dev, 1, (TZRAM_BASE / KiB), (TZRAM_SIZE / KiB)); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 51 | |
| 52 | if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) && display_init_required()) |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 53 | rk_display_init(dev); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 54 | else |
| 55 | printk(BIOS_INFO, "Display initialization disabled.\n"); |
Julius Werner | 7f96589 | 2016-08-29 15:07:58 -0700 | [diff] [blame] | 56 | |
| 57 | /* We don't need big CPUs, but bring them up as a courtesy to Linux. */ |
| 58 | rkclk_configure_cpu(APLL_600_MHZ, CPU_CLUSTER_BIG); |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | static struct device_operations soc_ops = { |
| 62 | .read_resources = soc_read_resources, |
| 63 | .init = soc_init, |
| 64 | }; |
| 65 | |
Elyes HAOUAS | f3ca88b | 2018-05-25 09:52:45 +0200 | [diff] [blame] | 66 | static void enable_soc_dev(struct device *dev) |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 67 | { |
| 68 | dev->ops = &soc_ops; |
| 69 | } |
| 70 | |
| 71 | struct chip_operations soc_rockchip_rk3399_ops = { |
Paul Menzel | 3727776 | 2016-07-03 09:45:26 +0200 | [diff] [blame] | 72 | CHIP_NAME("SOC Rockchip RK3399") |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 73 | .enable_dev = enable_soc_dev, |
| 74 | }; |