| Andrey Petrov | 3e2e050 | 2017-06-05 13:22:24 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * Copyright (C) 2017 Intel Corporation. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <intelblocks/cpulib.h> |
| 18 | #include <intelblocks/fast_spi.h> |
| 19 | #include <soc/bootblock.h> |
| 20 | |
| 21 | void bootblock_cpu_init(void) |
| 22 | { |
| 23 | /* Temporarily cache the memory-mapped boot media. */ |
| 24 | if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) && |
| 25 | IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) |
| 26 | fast_spi_cache_bios_region(); |
| 27 | } |