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huang lina6dbfb52016-03-02 18:38:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2016 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
Lin Huangfe7aa202016-03-19 22:44:39 +080017#include <arch/mmu.h>
Julius Werner5d6593a2018-08-10 16:13:26 -070018#include <arch/stages.h>
Derek Basehore38bee532016-09-21 17:42:26 -070019#include <delay.h>
Lin Huangfe7aa202016-03-19 22:44:39 +080020#include <soc/mmu_operations.h>
Shunqian Zhengf4181ce2016-05-06 16:50:48 +080021#include <soc/tsadc.h>
Lin Huangc4cbf482016-03-17 15:28:33 +080022#include <soc/sdram.h>
Vadim Bendebury04884b62016-04-12 16:06:31 -070023#include <symbols.h>
Liangfeng Wu76655cb2016-05-26 16:06:58 +080024#include <soc/usb.h>
Lin Huangfe7aa202016-03-19 22:44:39 +080025
Julius Werner6486e782017-07-14 14:30:29 -070026#include "board.h"
Eric Gao61e6c442016-07-29 12:34:32 +080027#include "pwm_regulator.h"
28
Vadim Bendebury04884b62016-04-12 16:06:31 -070029static void init_dvs_outputs(void)
30{
Eric Gao61e6c442016-07-29 12:34:32 +080031 pwm_regulator_configure(PWM_REGULATOR_GPU, 900);
32 pwm_regulator_configure(PWM_REGULATOR_BIG, 900);
Douglas Anderson992c7db2017-04-17 13:18:11 -070033
Philip Chena0618202017-08-23 18:02:25 -070034 /*
35 * Kevin's logic rail has some ripple, so up the voltage a bit. Newer
36 * boards use a fixed 900mV regulator for centerlogic.
37 */
Douglas Anderson992c7db2017-04-17 13:18:11 -070038 if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
39 pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 925);
Philip Chena0618202017-08-23 18:02:25 -070040 else if (IS_ENABLED(CONFIG_GRU_HAS_CENTERLOG_PWM))
Douglas Anderson992c7db2017-04-17 13:18:11 -070041 pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 900);
42
Derek Basehore38bee532016-09-21 17:42:26 -070043 /* Allow time for the regulators to settle */
44 udelay(500);
Vadim Bendebury04884b62016-04-12 16:06:31 -070045}
46
Caesar Wang01cbe3b2017-02-27 17:55:39 +080047static void prepare_sdmmc(void)
48{
Julius Werner6486e782017-07-14 14:30:29 -070049 /* Enable main SD rail early to allow ramp time before powering SDIO. */
50 gpio_output(GPIO_SDMMC_PWR, 1);
Caesar Wang01cbe3b2017-02-27 17:55:39 +080051}
52
Liangfeng Wu76655cb2016-05-26 16:06:58 +080053static void prepare_usb(void)
54{
55 /*
56 * Do dwc3 core soft reset and phy reset. Kick these resets
57 * off early so they get at least 100ms to settle.
58 */
Julius Werner785ff1b2016-08-03 19:18:39 -070059 reset_usb_otg0();
60 reset_usb_otg1();
Liangfeng Wu76655cb2016-05-26 16:06:58 +080061}
62
Julius Werner5d6593a2018-08-10 16:13:26 -070063void platform_romstage_main(void)
huang lina6dbfb52016-03-02 18:38:40 +080064{
Shunqian Zhengf4181ce2016-05-06 16:50:48 +080065 tsadc_init(TSHUT_POL_HIGH);
Lin Huangfe7aa202016-03-19 22:44:39 +080066
Vadim Bendebury04884b62016-04-12 16:06:31 -070067 /* Init DVS to conservative values. */
68 init_dvs_outputs();
69
Caesar Wang01cbe3b2017-02-27 17:55:39 +080070 prepare_sdmmc();
Liangfeng Wu76655cb2016-05-26 16:06:58 +080071 prepare_usb();
72
Lin Huangc4cbf482016-03-17 15:28:33 +080073 sdram_init(get_sdram_config());
Lin Huangfe7aa202016-03-19 22:44:39 +080074
Lin Huangf00af582016-11-15 11:40:58 +080075 mmu_config_range((void *)0, (uintptr_t)sdram_size_mb() * MiB,
76 CACHED_MEM);
Julius Werner7e0dea62019-02-20 18:39:22 -080077 mmu_config_range(_dma_coherent, REGION_SIZE(dma_coherent),
78 UNCACHED_MEM);
huang lina6dbfb52016-03-02 18:38:40 +080079}