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Kyösti Mälkki595ef3d2015-05-27 12:44:16 +03001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030014 */
15
Elyes HAOUAS19f5ba82018-10-14 14:52:06 +020016#include <AGESA.h>
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030017#include <northbridge/amd/agesa/BiosCallOuts.h>
Kyösti Mälkki65200be2017-03-04 07:33:45 +020018#include <northbridge/amd/agesa/state_machine.h>
Elyes HAOUAS19f5ba82018-10-14 14:52:06 +020019#include <FchPlatform.h>
20#include <cbfs.h>
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030021#include "imc.h"
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030022#include <stdlib.h>
Patrick Georgi0e3c59e2017-01-28 15:59:25 +010023#include <spd_bin.h>
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030024
Fabian Kunkel8cab72e2016-07-26 22:46:23 +020025static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr);
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030026
27const BIOS_CALLOUT_STRUCT BiosCallouts[] =
28{
29 {AGESA_DO_RESET, agesa_Reset },
Fabian Kunkel8cab72e2016-07-26 22:46:23 +020030 {AGESA_READ_SPD, board_ReadSpd_from_cbfs },
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030031 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
32 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
33 {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
34 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
35 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +030036 {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
37};
38const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
39
40/**
41 * ALC272 Verb Table
42 */
43const CODEC_ENTRY Alc272_VerbTbl[] = {
44 {0x11, 0x411111F0}, // - SPDIF_OUT2
45 {0x12, 0x411111F0}, // - DMIC_1/2
46 {0x13, 0x411111F0}, // - DMIC_3/4
47 {0x14, 0x411111F0}, // Port D - LOUT1
48 {0x15, 0x01011050}, // Port A - LOUT2 Explorer 2x DAC
49 {0x16, 0x411111F0}, //
50 {0x17, 0x411111F0}, // Port H - MONO
51 {0x18, 0x01a11840}, // Port B - MIC1
52 {0x19, 0x411111F0}, // Port F - MIC2
53 {0x1a, 0x01811030}, // Port C - LINE1
54 {0x1b, 0x01811020}, // Port E - LINE2 Explorer 2x ADC
55 {0x1d, 0x40130605}, // - PCBEEP
56 {0x1e, 0x411111F0}, // - SPDIF_OUT1
57 {0x21, 0x01211010}, // Port I - HPOUT
58 {0xff, 0xffffffff}
59};
60
61static const CODEC_TBL_LIST CodecTableList[] =
62{
63 {0x10ec0272, (CODEC_ENTRY*)&Alc272_VerbTbl[0]},
64 {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
65};
66
67#define FAN_INPUT_INTERNAL_DIODE 0
68#define FAN_INPUT_TEMP0 1
69#define FAN_INPUT_TEMP1 2
70#define FAN_INPUT_TEMP2 3
71#define FAN_INPUT_TEMP3 4
72#define FAN_INPUT_TEMP0_FILTER 5
73#define FAN_INPUT_ZERO 6
74#define FAN_INPUT_DISABLED 7
75
76#define FAN_AUTOMODE (1 << 0)
77#define FAN_LINEARMODE (1 << 1)
78#define FAN_STEPMODE ~(1 << 1)
79#define FAN_POLARITY_HIGH (1 << 2)
80#define FAN_POLARITY_LOW ~(1 << 2)
81
82/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
83#define FREQ_28KHZ 0x0
84#define FREQ_25KHZ 0x1
85#define FREQ_23KHZ 0x2
86#define FREQ_21KHZ 0x3
87#define FREQ_29KHZ 0x4
88#define FREQ_18KHZ 0x5
89#define FREQ_100HZ 0xF7
90#define FREQ_87HZ 0xF8
91#define FREQ_58HZ 0xF9
92#define FREQ_44HZ 0xFA
93#define FREQ_35HZ 0xFB
94#define FREQ_29HZ 0xFC
95#define FREQ_22HZ 0xFD
96#define FREQ_14HZ 0xFE
97#define FREQ_11HZ 0xFF
98
99/* Hardware Monitor Fan Control
100 * Hardware limitation:
101 * HWM failed to read the input temperture vi I2C,
102 * if other software switch the I2C switch by mistake or intention.
103 * We recommend to using IMC to control Fans, instead of HWM.
104 */
105static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
106{
107 /* Enable IMC fan control. the recommand way */
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600108 if (IS_ENABLED(CONFIG_HUDSON_IMC_FWM)) {
109 imc_reg_init();
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300110
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600111 /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */
112 FchParams->Hwm.HwMonitorEnable = TRUE;
113 FchParams->Hwm.HwmFchtsiAutoPoll = FALSE;/* 0 disable, 1 enable TSI Auto Polling */
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300114
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600115 FchParams->Imc.ImcEnable = TRUE;
116 FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */
Elyes HAOUASa342f392018-10-17 10:56:26 +0200117 FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300118
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600119 LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader);
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300120
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600121 /* Thermal Zone Parameter */
122 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
123 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
124 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; //BIT0 | BIT2 | BIT5;
125 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x4e;//6 | BIT3;
126 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
127 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
128 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x9a; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */
129 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
130 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM steping rate in unit of PWM level percentage */
131 FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300132
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600133 /* IMC Fan Policy temperature thresholds */
134 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
135 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
136 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 50; /*AC0 threshold in Celsius */
137 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 45; /*AC1 threshold in Celsius */
138 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 40; /*AC2 threshold in Celsius */
139 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */
140 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */
141 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */
142 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */
143 FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */
144 FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */
145 FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300146
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600147 /* IMC Fan Policy PWM Settings */
148 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
149 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
150 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 100; /* AL0 percentage */
151 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 99; /* AL1 percentage */
152 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 98; /* AL2 percentage */
153 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */
154 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */
155 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */
156 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */
157 FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300158
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600159 FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x111;//BIT0 | BIT4 |BIT8;
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300160
Marshall Dawson6dd620b2017-08-16 18:04:06 -0600161 /* NOTE:
162 * FchInitLateHwm will overwrite the EcStruct with EcDefaultMassege,
163 * AGESA put EcDefaultMassege as global data in ROM, so we can't overwride it.
164 * so we remove it from AGESA code. Please Seee FchInitLateHwm.
165 */
166 } else {
167 /* HWM fan control, the way not recommand */
168 FchParams->Imc.ImcEnable = FALSE;
169 FchParams->Hwm.HwMonitorEnable = TRUE;
170 FchParams->Hwm.HwmFchtsiAutoPoll = TRUE;/* 1 enable, 0 disable TSI Auto Polling */
171 }
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300172}
173
Kyösti Mälkki65200be2017-03-04 07:33:45 +0200174void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300175{
Kyösti Mälkki65200be2017-03-04 07:33:45 +0200176}
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300177
Kyösti Mälkki65200be2017-03-04 07:33:45 +0200178void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
179{
180 /* Azalia Controller OEM Codec Table Pointer */
181 FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300182
Kyösti Mälkki65200be2017-03-04 07:33:45 +0200183 /* Fan Control */
184 oem_fan_control(FchParams_env);
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300185
Kyösti Mälkki65200be2017-03-04 07:33:45 +0200186 /* sata configuration */
187 /* disable GEN2 limitation */
188 FchParams_env->Sata.SataMode.SataSetMaxGen2 = FALSE;
Kyösti Mälkki595ef3d2015-05-27 12:44:16 +0300189}
Fabian Kunkel8cab72e2016-07-26 22:46:23 +0200190
191static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
192{
193 AGESA_STATUS Status = AGESA_UNSUPPORTED;
194#ifdef __PRE_RAM__
195 AGESA_READ_SPD_PARAMS *info = ConfigPtr;
196 u8 index;
197
198 if (IS_ENABLED(CONFIG_BAP_E20_DDR3_1066))
199 index = 1;
200 else /* CONFIG_BAP_E20_DDR3_800 */
201 index = 0;
202
203 if (info->MemChannelId > 0)
204 return AGESA_UNSUPPORTED;
205 if (info->SocketId != 0)
206 return AGESA_UNSUPPORTED;
207 if (info->DimmId != 0)
208 return AGESA_UNSUPPORTED;
209
210 /* Read index 0, first SPD_SIZE bytes of spd.bin file. */
Patrick Georgi2e08b592017-01-28 15:26:43 +0100211 if (read_ddr3_spd_from_cbfs((u8 *)info->Buffer, index) < 0)
Fabian Kunkel8cab72e2016-07-26 22:46:23 +0200212 die("No SPD data\n");
213
214 Status = AGESA_SUCCESS;
215#endif
216 return Status;
217}