Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| 5 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
Elyes HAOUAS | d2b9ec1 | 2018-10-27 09:41:02 +0200 | [diff] [blame] | 17 | #include <arch/cpu.h> |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 18 | #include <cpu/x86/msr.h> |
| 19 | #include <cpu/amd/mtrr.h> |
| 20 | |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 21 | #include <device/pci_ops.h> |
Timothy Pearson | ba2af2e | 2015-11-24 14:11:48 -0600 | [diff] [blame] | 22 | #include <device/device.h> |
| 23 | #include <device/pci.h> |
| 24 | |
Timothy Pearson | 86f4ca5 | 2015-03-13 13:27:58 -0500 | [diff] [blame] | 25 | #include <cbmem.h> |
| 26 | |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 27 | #include "ram_calc.h" |
| 28 | |
Timothy Pearson | ba2af2e | 2015-11-24 14:11:48 -0600 | [diff] [blame] | 29 | static inline uint8_t is_fam15h(void) |
| 30 | { |
| 31 | uint8_t fam15h = 0; |
| 32 | uint32_t family; |
| 33 | |
| 34 | family = cpuid_eax(0x80000001); |
| 35 | family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8); |
| 36 | |
| 37 | if (family >= 0x6f) |
| 38 | /* Family 15h or later */ |
| 39 | fam15h = 1; |
| 40 | |
| 41 | return fam15h; |
| 42 | } |
| 43 | |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 44 | uint64_t get_uma_memory_size(uint64_t topmem) |
| 45 | { |
| 46 | uint64_t uma_size = 0; |
| 47 | if (IS_ENABLED(CONFIG_GFXUMA)) { |
| 48 | /* refer to UMA Size Consideration in 780 BDG. */ |
Timothy Pearson | e24f7d3 | 2015-03-19 00:03:59 -0500 | [diff] [blame] | 49 | if (topmem >= 0x40000000) /* 1GB and above system memory */ |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 50 | uma_size = 0x10000000; /* 256M recommended UMA */ |
| 51 | |
Timothy Pearson | e24f7d3 | 2015-03-19 00:03:59 -0500 | [diff] [blame] | 52 | else if (topmem >= 0x20000000) /* 512M - 1023M system memory */ |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 53 | uma_size = 0x8000000; /* 128M recommended UMA */ |
| 54 | |
Timothy Pearson | e24f7d3 | 2015-03-19 00:03:59 -0500 | [diff] [blame] | 55 | else if (topmem >= 0x10000000) /* 256M - 511M system memory */ |
Timothy Pearson | 4916880 | 2015-03-13 12:48:31 -0500 | [diff] [blame] | 56 | uma_size = 0x4000000; /* 64M recommended UMA */ |
| 57 | } |
| 58 | |
| 59 | return uma_size; |
| 60 | } |
Timothy Pearson | 86f4ca5 | 2015-03-13 13:27:58 -0500 | [diff] [blame] | 61 | |
Timothy Pearson | ba2af2e | 2015-11-24 14:11:48 -0600 | [diff] [blame] | 62 | uint64_t get_cc6_memory_size() |
| 63 | { |
| 64 | uint8_t enable_cc6; |
| 65 | |
| 66 | uint64_t cc6_size = 0; |
| 67 | |
| 68 | if (is_fam15h()) { |
| 69 | enable_cc6 = 0; |
| 70 | |
| 71 | #ifdef __PRE_RAM__ |
| 72 | if (pci_read_config32(PCI_DEV(0, 0x18, 2), 0x118) & (0x1 << 18)) |
| 73 | enable_cc6 = 1; |
| 74 | #else |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 75 | struct device *dct_dev = pcidev_on_root(0x18, 2); |
Timothy Pearson | ba2af2e | 2015-11-24 14:11:48 -0600 | [diff] [blame] | 76 | if (pci_read_config32(dct_dev, 0x118) & (0x1 << 18)) |
| 77 | enable_cc6 = 1; |
| 78 | #endif |
| 79 | |
| 80 | if (enable_cc6) { |
| 81 | /* Preserve the maximum possible CC6 save region |
| 82 | * This needs to be kept in sync with |
| 83 | * amdfam10_domain_read_resources() in northbridge.c |
| 84 | */ |
| 85 | cc6_size = 0x8000000; |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | return cc6_size; |
| 90 | } |
| 91 | |
Timothy Pearson | 86f4ca5 | 2015-03-13 13:27:58 -0500 | [diff] [blame] | 92 | void *cbmem_top(void) |
| 93 | { |
| 94 | uint32_t topmem = rdmsr(TOP_MEM).lo; |
| 95 | |
Timothy Pearson | ba2af2e | 2015-11-24 14:11:48 -0600 | [diff] [blame] | 96 | return (void *) topmem - get_uma_memory_size(topmem) - get_cc6_memory_size(); |
Timothy Pearson | 86f4ca5 | 2015-03-13 13:27:58 -0500 | [diff] [blame] | 97 | } |