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Paul Burtonc1081a42014-06-14 00:08:02 +01001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2014 Imagination Technologies
5#
6# This program is free software; you can redistribute it and/or
7# modify it under the terms of the GNU General Public License as
8# published by the Free Software Foundation; version 2 of
9# the License.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
18# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
19# MA 02110-1301 USA
20#
21
22config CPU_IMGTEC_DANUBE
Vadim Bendeburyb2e465d2014-08-29 16:34:46 -070023 select CPU_MIPS
Paul Burtonc1081a42014-06-14 00:08:02 +010024 select DYNAMIC_CBMEM
25 select HAVE_UART_MEMORY_MAPPED
26 select HAVE_UART_SPECIAL
27 bool
28
29if CPU_IMGTEC_DANUBE
30
31config BOOTBLOCK_CPU_INIT
32 string
33 default "soc/imgtec/danube/bootblock.c"
34
35config BOOTBLOCK_BASE
36 hex
37 default 0x9b000000
38
39config CBFS_ROM_OFFSET
40 # Effectively the maximum size of the bootblock
41 hex
42 default 0x4000
43
44config ROMSTAGE_BASE
45 hex
46 default 0x9b004000
47 help
48 The address where romstage is supposed to be loaded, right above the
49 bootblock.
50
51config CBMEM_CONSOLE_PRERAM_BASE
52 hex "memory address of the CBMEM console buffer"
53 default 0x9b00f800
54 help
55 Allocate 4KB to the pre-ram console buffer, we should be able to use
56 GRAM eventually and have a much larger buffer.
57
58config STACK_TOP
59 hex
60 default CBMEM_CONSOLE_PRERAM_BASE
61
62config STACK_BOTTOM
63 hex
64 default 0x9b00f000
65 help
66 Allocating 12KB for the stack, should be able to have more once GRAM
67 is available.
68
69endif