blob: 7ec3c81dc484be8642d879c79a823a0e3978b632 [file] [log] [blame]
Stefan Reinauer6a5bc462007-01-17 10:57:42 +00001/*
2 * This file is part of the LinuxBIOS project.
3 *
4 * Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
5 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +00006 * Copyright (C) 2007 Carl-Daniel Hailfinger
Stefan Reinauer6a5bc462007-01-17 10:57:42 +00007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 */
22
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000023#include <stdio.h>
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000024#include <stdlib.h>
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000025#include <sys/io.h>
26
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000027/* well, they really thought this through, eh? Family is 8 bits!!!! */
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000028char *familyid[] = {
29 [0xf1] = "pc8374 (winbond, was NS)"
30};
31
32/* eventually, if you care, break this out into a file. For now, I don't know
33 * if we need this.
34 */
35
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000036unsigned char regval(unsigned short port, unsigned char reg) {
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000037 outb(reg, port);
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000038 return inb(port + 1);
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000039}
40
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000041void regwrite(unsigned short port, unsigned char reg, unsigned char val) {
42 outb(reg, port);
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000043 outb(val, port + 1);
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000044}
45
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000046void
47dump_ns8374(unsigned short port) {
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000048 printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
49 regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
50 regval(port, 0x24), regval(port, 0x26));
Ronald G. Minnich74f36092006-03-01 16:11:05 +000051 printf("SMBUS at %02x\n", regval(port, 0x2a));
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000052 /* check COM1. This is all we care about at present. */
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000053 printf("COM 1 is Globally %s\n", regval(port, 0x26) & 8 ? "disabled" : "enabled");
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000054 /* select com1 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000055 regwrite(port, 0x07, 0x03);
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000056 printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
57 printf("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
58 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71),
59 regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0));
Ronald G. Minnich74f36092006-03-01 16:11:05 +000060 /* select gpio */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000061 regwrite(port, 0x07, 0x07);
Ronald G. Minnich74f36092006-03-01 16:11:05 +000062 printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
63 printf("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
64 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71),
65 regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0));
Ronald G. Minnich394e7c42006-02-22 22:12:21 +000066
67}
68
69void
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000070dump_fintek(unsigned short port, unsigned int did)
71{
72 switch(did) {
73 case 0x0604:
74 printf ("Fintek F71805\n");
75 break;
76 case 0x4103:
77 printf ("Fintek F71872\n");
78 break;
79 default:
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000080 printf ("Unknown Fintek SuperI/O: did=0x%04x\n", did);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000081 return;
82 }
83
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000084 printf("Flash write is %s.\n", regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000085 printf("Flash control is 0x%04x.\n", regval(port, 0x28));
86 printf("27=%02x\n", regval(port, 0x27));
87 printf("29=%02x\n", regval(port, 0x29));
88 printf("2a=%02x\n", regval(port, 0x2a));
89 printf("2b=%02x\n", regval(port, 0x2b));
90
91 /* select UART 1 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000092 regwrite(port, 0x07, 0x01);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000093 printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
94 printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +000095 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
96 regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
Stefan Reinauer6a5bc462007-01-17 10:57:42 +000097
98 /* select UART 2 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +000099 regwrite(port, 0x07, 0x02);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000100 printf("UART2 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
101 printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000102 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
103 regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000104
105 /* select Parport */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000106 regwrite(port, 0x07, 0x03);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000107 printf("PARPORT is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
108 printf("PARPORT base=%02x%02x, irq=%02x\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000109 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000110
111 /* select hw monitor */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000112 regwrite(port, 0x07, 0x04);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000113 printf("HW monitor is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
114 printf("HW monitor base=%02x%02x, irq=%02x\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000115 regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000116
117 /* select gpio */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000118 regwrite(port, 0x07, 0x05);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000119 printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
120 printf("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
121 regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1), regval(port, 0xe2),
122 regval(port, 0xe3), regval(port, 0xe4), regval(port, 0xe5));
123 printf("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
124 regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8), regval(port, 0xe9),
125 regval(port, 0xf0), regval(port, 0xf1), regval(port, 0xf3), regval(port, 0xf4));
126 printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n",
127 regval(port, 0xf5), regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
128
129
130}
131
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000132/* End Of Table */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000133#define EOT -1
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000134/* NO LDN needed */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000135#define NOLDN -2
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000136/* Not Available */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000137#define NANA -3
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000138/* Maximum Name Length */
139#define MAXNAMELEN 20
140/* Biggest LDN */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000141#define MAXLDN 0xa
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000142/* biggestLDN + 0 + NOLDN + EOT */
143#define LDNSIZE MAXLDN + 3
144/* MAXimum NUMber of Indexes */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000145#define MAXNUMIDX 70
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000146#define IDXSIZE MAXNUMIDX + 1
147
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000148const static struct ite_registers {
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000149 /* yes, superio_id should be unsigned, but EOT has to be negative */
150 signed short superio_id;
151 char name[MAXNAMELEN];
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000152 struct ite_ldnidx {
153 signed short ldn;
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000154 signed short idx[IDXSIZE];
155 signed short def[IDXSIZE];
156 } ldn[LDNSIZE];
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000157} ite_reg_table[] = {
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000158 {0x8702, "IT8702", {
159 {EOT}}},
160 {0x8705, "IT8705 or IT8700", {
161 {EOT}}},
162 {0x8710, "IT8710", {
163 {EOT}}},
164 {0x8712, "IT8712", {
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000165 {NOLDN,
166 {0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
167 {NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
168 {0x0,
169 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
170 {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
171 {0x1,
172 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
173 {0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
174 {0x2,
175 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
176 {0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
177 {0x3,
178 {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
179 {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
180 {0x4,
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000181 {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
182 0xf4,0xf5,0xf6,EOT},
183 {0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
184 0x00,NANA,NANA,EOT}},
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000185 {0x5,
186 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
187 {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
188 {0x6,
189 {0x30,0x70,0x71,0xf0,EOT},
190 {0x00,0x0c,0x02,0x00,EOT}},
191 {0x7,
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000192 {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
193 0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
194 0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
195 0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
196 0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
197 0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
198 {0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
199 0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,
200 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
201 0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
202 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
203 0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000204 {0x8,
205 {0x30,0x60,0x61,0x70,0xf0,EOT},
206 {0x00,0x03,0x00,0x0a,0x00,EOT}},
207 {0x9,
208 {0x30,0x60,0x61,EOT},
209 {0x00,0x02,0x01,EOT}},
210 {0xa,
211 {0x30,0x60,0x61,0x70,0xf0,EOT},
212 {0x00,0x03,0x10,0x0b,0x00,EOT}},
213 {EOT}}},
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000214 {0x8716, "IT8716", {
215 {EOT}}},
216 {0x8718, "IT8718", {
217 {EOT}}},
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000218 {EOT}
219};
220
221void
222dump_ite(unsigned short port, unsigned short id)
223{
224 int i, j, k;
225 signed short *idx;
226 printf ("ITE ");
227
228
229 /* ID Mapping Table
230 unknown -> IT8711 (no datasheet)
231 unknown -> IT8722 (no datasheet)
232 0x8702 -> IT8702
233 0x8705 -> IT8700 or IT8705
234 0x8708 -> IT8708
235 0x8710 -> IT8710
236 0x8712 -> IT8712
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000237 0x8716 -> IT8716
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000238 0x8718 -> IT8718
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000239 0x8726 -> IT8726 (datasheet wrongly says 0x8716)
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000240 */
241 switch(id) {
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000242 case 0x8702:
243 case 0x8705:
244 case 0x8710:
245 case 0x8712:
246 case 0x8716:
247 case 0x8718:
248 for (i=0;; i++) {
249 if (ite_reg_table[i].superio_id == EOT)
250 break;
251 if ((unsigned short)ite_reg_table[i].superio_id != id)
252 continue;
253 printf ("%s\n", ite_reg_table[i].name);
254 for (j=0;; j++) {
255 if (ite_reg_table[i].ldn[j].ldn == EOT)
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000256 break;
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000257 if (ite_reg_table[i].ldn[j].ldn != NOLDN) {
258 printf("switching to LDN 0x%01x\n",
259 ite_reg_table[i].ldn[j].ldn);
260 regwrite(port, 0x07,
261 ite_reg_table[i].ldn[j].ldn);
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000262 }
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000263 idx = ite_reg_table[i].ldn[j].idx;
264 printf("idx ");
265 for (k=0;; k++) {
266 if (idx[k] == EOT)
267 break;
268 printf("%02x ", idx[k]);
269 }
270 printf("\nval ");
271 for (k=0;; k++) {
272 if (idx[k] == EOT)
273 break;
274 printf("%02x ", regval(port, idx[k]));
275 }
276 printf("\ndef ");
277 idx = ite_reg_table[i].ldn[j].def;
278 for (k=0;; k++) {
279 if (idx[k] == EOT)
280 break;
281 if (idx[k] == NANA)
282 printf("NA ");
283 else
284 printf("%02x ", idx[k]);
285 }
286 printf("\n");
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000287 }
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000288
289 }
290 break;
291 default:
292 printf ("unknown ITE chip, id=%04x\n", id);
293 for (i=0x20; i<=0x24; i++)
294 printf("index %02x=%02x\n", i, regval(port, i));
295 break;
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000296 }
297}
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000298
299void
300probe_idregs_simple(unsigned short port){
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000301 unsigned char id;
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000302 outb(0x20, port);
303 if (inb(port) != 0x20) {
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000304 if (inb(port) == 0xff )
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000305 printf ("No SuperI/O chip found at 0x%04x\n", port);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000306 else
307 printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000308 port, inb(port), inb(port + 1));
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000309 return;
310 }
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000311 id = inb(port + 1);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000312
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000313 printf("SuperI/O found at 0x%02x: id = 0x%02x\n", port, id);
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000314 if (id == 0xff)
315 return;
316
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000317 if (familyid[id])
318 printf("%s\n", familyid[id]);
319 else
320 printf("<unknown>\n");
321
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000322 switch(id) {
323 case 0xf1:
324 dump_ns8374(port);
325 break;
326 default:
327 printf("no dump for 0x%02x\n", id);
328 break;
329 }
330}
331
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000332
333void
334probe_idregs_fintek(unsigned short port){
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000335 unsigned int vid, did, success = 0;
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000336
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000337 /* Enable configuration sequence (Fintek uses this for example)
338 Older ITE chips have the same enable sequence */
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000339 outb(0x87, port);
340 outb(0x87, port);
341
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000342 outb(0x20, port);
343 if (inb(port) != 0x20) {
344 if (inb(port) == 0xff )
345 printf ("No SuperIO chip found at 0x%04x\n", port);
346 else
347 printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000348 port, inb(port), inb(port + 1));
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000349 return;
350 }
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000351 did = inb(port + 1);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000352
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000353 did |= (regval(port, 0x21)<<8);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000354
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000355 vid = regval(port, 0x23);
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000356 vid |= (regval(port, 0x24)<<8);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000357
358 printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did);
359
360 if (vid == 0xff || vid == 0xffff)
361 return;
362
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000363 /* printf("%s\n", familyid[id]); */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000364 switch(did) {
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000365 case 0x0887: /* pseudoreversed for ITE8708 */
366 case 0x1087: /* pseudoreversed for ITE8710 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000367 success = 1;
368 dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000369 /* disable configuration */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000370 regwrite(port, 0x02, 0x02);
371 break;
372 default:
373 break;
374 }
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000375 switch(vid) {
376 case 0x3419:
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000377 success = 1;
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000378 dump_fintek(port, did);
379 break;
380 default:
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000381 break;
382 }
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000383 if (!success)
384 printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000385
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000386 /* disable configuration (for Fintek, doesn't hurt ITE) */
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000387 outb(0xaa, port);
388}
389
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000390void
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000391probe_idregs_ite(unsigned short port){
392 unsigned int id, chipver;
393
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000394 /* Enable configuration sequence (ITE uses this for newer IT87[012]x)
395 IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
396 IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
397 IT86xx series uses different ports
398 IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
399 IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000400 outb(0x87, port);
401 outb(0x01, port);
402 outb(0x55, port);
403 if (port == 0x2e)
404 outb(0x55, port);
405 else
406 outb(0xAA, port);
407
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000408 /* Read Chip ID Byte 1 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000409 id = regval(port, 0x20);
410 if (id != 0x87) {
411 if (inb(port) == 0xff )
412 printf ("No SuperIO chip found at 0x%04x\n", port);
413 else
414 printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000415 port, inb(port), inb(port + 1));
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000416 return;
417 }
418
419 id <<= 8;
420
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000421 /* Read Chip ID Byte 2 */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000422 id |= regval(port, 0x21);
423
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000424 /* Read Chip Version, only bit 3..0 for all IT87xx */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000425 chipver = regval(port, 0x22) & 0x0f;
426
427 /* ID Mapping Table
428 unknown -> IT8711 (no datasheet)
429 unknown -> IT8722 (no datasheet)
430 0x8702 -> IT8702
431 0x8705 -> IT8700 or IT8705
432 0x8710 -> IT8710
433 0x8712 -> IT8712
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000434 0x8716 -> IT8716
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000435 0x8718 -> IT8718
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000436 0x8726 -> IT8726 (datasheet wrongly says 0x8716)
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000437 */
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000438 printf("SuperI/O found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000439 port, id, chipver);
440
441 switch(id) {
442 case 0x8702:
443 case 0x8705:
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000444 case 0x8712:
445 case 0x8716:
446 case 0x8718:
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000447 case 0x8726:
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000448 dump_ite(port, id);
449 break;
450 default:
451 printf("no dump for id 0x%04x\n", id);
452 break;
453 }
Carl-Daniel Hailfingerb1786c22007-08-28 10:43:57 +0000454 /* disable configuration */
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000455 regwrite(port, 0x02, 0x02);
456}
457
458void
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000459probe_superio(unsigned short port) {
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000460 probe_idregs_simple(port);
461 probe_idregs_fintek(port);
Carl-Daniel Hailfinger7a7890a2007-08-27 07:28:28 +0000462 probe_idregs_ite(port);
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000463}
464
465int
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000466main(int argc, char *argv[])
467{
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000468 if (iopl(3) < 0) {
469 perror("iopl");
470 exit(1);
471 }
472
473 /* try the 2e */
474 probe_superio(0x2e);
475 /* now try the 4e */
476 probe_superio(0x4e);
Stefan Reinauer6a5bc462007-01-17 10:57:42 +0000477
478 return 0;
Ronald G. Minnich394e7c42006-02-22 22:12:21 +0000479}