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Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +02001chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
5
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
11 register "gpu_panel_power_cycle_delay" = "1"
12 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
13 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
14 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
15 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
16 register "gfx.use_spread_spectrum_clock" = "1"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020017 register "gpu_cpu_backlight" = "0x1155"
18 register "gpu_pch_backlight" = "0x06100610"
19
20 device cpu_cluster 0 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020021 chip cpu/intel/model_206ax
22 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010023 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010024 device lapic 0xacac off end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020025
26 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
27 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
28 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
29
30 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
31 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
32 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
33 end
34 end
35
Patrick Rudolph266a1f72016-06-09 18:13:34 +020036 register "pci_mmio_size" = "2048"
37
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020038 device domain 0 on
Peter Lemenkovf15f3102019-11-27 12:04:42 +010039 subsystemid 0x17aa 0x21ce inherit
40
41 device pci 00.0 on end # host bridge
Patrick Rudolph830fdc72016-04-21 07:15:14 +020042 device pci 01.0 on end # PCIe Bridge for discrete graphics
Peter Lemenkovf15f3102019-11-27 12:04:42 +010043 device pci 02.0 on end # Integrated Graphics Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020044
45 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
46 # GPI routing
47 # 0 No effect (default)
48 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
49 # 2 SCI (if corresponding GPIO_EN bit is also set)
50 register "alt_gp_smi_en" = "0x0000"
51 register "gpi1_routing" = "2"
52 register "gpi13_routing" = "2"
53
Iru Cai0bca3c92016-05-06 23:05:28 +080054 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
55 register "sata_port_map" = "0x1f"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020056 # Set max SATA speed to 6.0 Gb/s
57 register "sata_interface_speed_support" = "0x3"
58
59 register "gen1_dec" = "0x7c1601"
60 register "gen2_dec" = "0x0c15e1"
61 register "gen4_dec" = "0x0c06a1"
62
63 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
64
65 # Enable zero-based linear PCIe root port functions
66 register "pcie_port_coalesce" = "1"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010067
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020068 register "c2_latency" = "101" # c2 not supported
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020069
Patrick Rudolphc670a412017-04-28 17:28:32 +020070 # device specific SPI configuration
71 register "spi_uvscc" = "0x2005"
72 register "spi_lvscc" = "0x2005"
73
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020074 device pci 16.0 off end # Management Engine Interface 1
75 device pci 16.1 off end # Management Engine Interface 2
76 device pci 16.2 off end # Management Engine IDE-R
77 device pci 16.3 off end # Management Engine KT
Peter Lemenkovf15f3102019-11-27 12:04:42 +010078 device pci 19.0 on end # Intel Gigabit Ethernet
79 device pci 1a.0 on end # USB Enhanced Host Controller #2
80 device pci 1b.0 on end # High Definition Audio Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020081 device pci 1c.0 off end # PCIe Port #1
Peter Lemenkovf15f3102019-11-27 12:04:42 +010082 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020083 device pci 1c.2 off end # PCIe Port #3
84 device pci 1c.3 on
Patrick Rudolph05216322019-04-12 16:14:27 +020085 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020086 end # PCIe Port #4 ExpressCard
87 device pci 1c.4 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020088 chip drivers/ricoh/rce822
89 register "sdwppol" = "1"
90 register "disable_mask" = "0x87"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010091 device pci 00.0 on end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020092 end
93 end # PCIe Port #5 (Ricoh SD & FW)
94 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
95 device pci 1c.6 off end # PCIe Port #7
96 device pci 1c.7 off end # PCIe Port #8
Peter Lemenkovf15f3102019-11-27 12:04:42 +010097 device pci 1d.0 on end # USB Enhanced Host Controller #1
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020098 device pci 1e.0 off end # PCI bridge
99 device pci 1f.0 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200100 chip ec/lenovo/pmh7
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100101 device pnp ff.1 on end # dummy
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200102 register "backlight_enable" = "0x01"
103 register "dock_event_enable" = "0x01"
104 end
105
106 chip drivers/pc80/tpm
107 device pnp 0c31.0 on end
108 end
109
110 chip ec/lenovo/h8
111 device pnp ff.2 on # dummy
112 io 0x60 = 0x62
113 io 0x62 = 0x66
114 io 0x64 = 0x1600
115 io 0x66 = 0x1604
116 end
117
118 register "config0" = "0xa7"
119 register "config1" = "0x01"
120 register "config2" = "0xa0"
121 register "config3" = "0xe2"
122
123 register "has_keyboard_backlight" = "0"
124
125 register "beepmask0" = "0x02"
126 register "beepmask1" = "0x86"
127 register "has_power_management_beeps" = "1"
128 register "event2_enable" = "0xff"
129 register "event3_enable" = "0xff"
130 register "event4_enable" = "0xf0"
131 register "event5_enable" = "0x3c"
132 register "event6_enable" = "0x00"
133 register "event7_enable" = "0xa1"
134 register "event8_enable" = "0x7b"
135 register "event9_enable" = "0xff"
136 register "eventa_enable" = "0x00"
137 register "eventb_enable" = "0x00"
138 register "eventc_enable" = "0xff"
139 register "eventd_enable" = "0xff"
140 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200141
142 register "has_bdc_detection" = "1"
143 register "bdc_gpio_num" = "54"
144 register "bdc_gpio_lvl" = "0"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200145 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200146 chip drivers/lenovo/hybrid_graphics
147 device pnp ff.f on end # dummy
148
149 register "detect_gpio" = "21"
150
151 register "has_panel_hybrid_gpio" = "1"
152 register "panel_hybrid_gpio" = "52"
153 register "panel_integrated_lvl" = "1"
154
155 register "has_backlight_gpio" = "0"
156 register "has_dgpu_power_gpio" = "0"
157
158 register "has_thinker1" = "1"
159 end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200160 end # LPC Controller
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100161 device pci 1f.2 on end # 6 port SATA AHCI Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200162 device pci 1f.3 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200163 # eeprom, 8 virtual devices, same chip
164 chip drivers/i2c/at24rf08c
165 device i2c 54 on end
166 device i2c 55 on end
167 device i2c 56 on end
168 device i2c 57 on end
169 device i2c 5c on end
170 device i2c 5d on end
171 device i2c 5e on end
172 device i2c 5f on end
173 end
174 end # SMBus Controller
175 device pci 1f.5 off end # SATA Controller 2
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100176 device pci 1f.6 on end # Thermal
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200177 end
178 end
179end