Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 1 | chip soc/intel/skylake |
| 2 | # CPU |
| 3 | # Enable Enhanced Intel SpeedStep |
| 4 | register "eist_enable" = "1" |
| 5 | |
| 6 | # Graphics |
| 7 | # IGD Displays |
| 8 | register "panel_cfg" = "{ |
| 9 | .up_delay_ms = 0, // T3 |
| 10 | .backlight_on_delay_ms = 0, // T7 |
| 11 | .backlight_off_delay_ms = 0, // T9 |
| 12 | .down_delay_ms = 0, // T10 |
| 13 | .cycle_delay_ms = 500, // T12 |
| 14 | .backlight_pwm_hz = 200, // PWM |
| 15 | }" |
| 16 | |
| 17 | # FSP Memory |
| 18 | register "SaGv" = "SaGv_Enabled" |
| 19 | |
| 20 | # FSP Silicon |
| 21 | # Serial I/O |
| 22 | register "SerialIoDevMode" = "{ |
| 23 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 24 | [PchSerialIoIndexUart2] = PchSerialIoSkipInit, |
| 25 | }" |
| 26 | |
| 27 | # Power |
| 28 | register "PmConfigSlpS3MinAssert" = "2" # 50ms |
| 29 | register "PmConfigSlpS4MinAssert" = "3" # 1s |
| 30 | register "PmConfigSlpSusMinAssert" = "3" # 500ms |
| 31 | register "PmConfigSlpAMinAssert" = "3" # 2s |
| 32 | |
| 33 | # Thermal |
| 34 | register "tcc_offset" = "10" |
| 35 | |
| 36 | # PM Util |
| 37 | # GPE configuration |
| 38 | # Note that GPE events called out in ASL code rely on this |
| 39 | # route. i.e. If this route changes then the affected GPE |
| 40 | # offset bits also need to be changed. |
| 41 | # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) |
| 42 | register "gpe0_dw0" = "GPP_B" |
| 43 | register "gpe0_dw1" = "GPP_C" |
| 44 | register "gpe0_dw2" = "GPP_E" |
| 45 | |
| 46 | # Enable the correct decode ranges on the LPC bus. |
| 47 | register "lpc_ioe" = "LPC_IOE_EC_4E_4F | |
| 48 | LPC_IOE_KBC_60_64 | |
| 49 | LPC_IOE_EC_62_66" |
| 50 | |
| 51 | # Actual device tree. |
Arthur Heymans | 69cd729 | 2022-11-07 13:52:11 +0100 | [diff] [blame] | 52 | device cpu_cluster 0 on end |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 53 | |
| 54 | device domain 0 on |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 55 | device ref igpu on end |
| 56 | device ref sa_thermal on end |
| 57 | device ref south_xhci on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 58 | # Motherboard USB Type C |
| 59 | register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" |
Sean Rhodes | 220a47d | 2022-05-30 10:39:00 +0100 | [diff] [blame] | 60 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" |
| 61 | |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 62 | # Motherboard USB 3.0 |
| 63 | register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" |
Sean Rhodes | 220a47d | 2022-05-30 10:39:00 +0100 | [diff] [blame] | 64 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" |
| 65 | |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 66 | # Daughterboard USB 3.0 |
| 67 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" |
Sean Rhodes | 220a47d | 2022-05-30 10:39:00 +0100 | [diff] [blame] | 68 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" |
| 69 | |
Sean Rhodes | e36205d | 2022-08-30 10:10:57 +0100 | [diff] [blame] | 70 | # Internal Bluetooth |
| 71 | register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" |
| 72 | |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 73 | # Daughterboard SD Card |
| 74 | register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" |
| 75 | |
Sean Rhodes | 2eb2dce | 2022-05-26 20:56:14 +0100 | [diff] [blame] | 76 | # Webcam |
| 77 | register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 78 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 79 | device ref thermal on end |
| 80 | device ref i2c0 on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 81 | chip drivers/i2c/hid |
| 82 | register "generic.hid" = ""STAR0001"" |
| 83 | register "generic.desc" = ""Touchpad"" |
| 84 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C23_IRQ)" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 85 | register "generic.detect" = "1" |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 86 | register "hid_desc_reg_offset" = "0x20" |
| 87 | device i2c 2c on end |
| 88 | end |
| 89 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 90 | device ref heci1 on end |
| 91 | device ref sata on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 92 | register "SataSalpSupport" = "1" |
| 93 | # Port 1 |
| 94 | register "SataPortsEnable[1]" = "1" |
| 95 | register "SataPortsDevSlp[1]" = "1" |
| 96 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 97 | device ref uart2 on end |
| 98 | device ref pcie_rp6 on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 99 | register "PcieRpEnable[5]" = "1" |
| 100 | register "PcieRpClkReqSupport[5]" = "1" |
| 101 | register "PcieRpClkReqNumber[5]" = "4" |
| 102 | register "PcieRpClkSrcNumber[5]" = "4" |
| 103 | register "PcieRpLtrEnable[5]" = "1" |
| 104 | chip drivers/wifi/generic |
| 105 | device generic 0 on end |
| 106 | end |
| 107 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 108 | device ref pcie_rp9 on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 109 | register "PcieRpEnable[8]" = "1" |
| 110 | register "PcieRpClkReqSupport[8]" = "1" |
| 111 | register "PcieRpClkReqNumber[8]" = "0" |
| 112 | register "PcieRpClkSrcNumber[8]" = "0" |
| 113 | register "PcieRpLtrEnable[8]" = "1" |
| 114 | smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" |
| 115 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 116 | device ref uart0 on end |
Felix Singer | affd456 | 2023-11-12 17:06:28 +0000 | [diff] [blame^] | 117 | device ref lpc_espi on |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 118 | register "gen1_dec" = "0x000c0681" |
| 119 | register "gen2_dec" = "0x000c1641" |
| 120 | register "gen3_dec" = "0x00000069" |
| 121 | register "gen4_dec" = "0x0000006d" |
| 122 | |
| 123 | chip ec/starlabs/merlin |
| 124 | # Port pair 4Eh/4Fh |
| 125 | device pnp 4e.00 on end # IO Interface |
| 126 | device pnp 4e.01 off end # Com 1 |
| 127 | device pnp 4e.02 off end # Com 2 |
| 128 | device pnp 4e.04 off end # System Wake-Up |
| 129 | device pnp 4e.05 off end # PS/2 Mouse |
| 130 | device pnp 4e.06 on # PS/2 Keyboard |
| 131 | io 0x60 = 0x0060 |
| 132 | io 0x62 = 0x0064 |
| 133 | irq 0x70 = 1 |
| 134 | end |
| 135 | device pnp 4e.0a off end # Consumer IR |
| 136 | device pnp 4e.0f off end # Shared Memory/Flash Interface |
| 137 | device pnp 4e.10 off end # RTC-like Timer |
| 138 | device pnp 4e.11 off end # Power Management Channel 1 |
| 139 | device pnp 4e.12 off end # Power Management Channel 2 |
| 140 | device pnp 4e.13 off end # Serial Peripheral Interface |
| 141 | device pnp 4e.14 off end # Platform EC Interface |
| 142 | device pnp 4e.17 off end # Power Management Channel 3 |
| 143 | device pnp 4e.18 off end # Power Management Channel 4 |
| 144 | device pnp 4e.19 off end # Power Management Channel 5 |
| 145 | end |
| 146 | end |
Sean Rhodes | 148f075 | 2022-09-07 16:39:44 +0100 | [diff] [blame] | 147 | device ref hda on end |
| 148 | device ref smbus on end |
| 149 | device ref fast_spi on end |
Sean Rhodes | ab5b7b3 | 2021-10-22 14:33:27 +0100 | [diff] [blame] | 150 | end |
| 151 | end |