blob: 6ca2ce1f5521b2fb6d74a7fe6dc1342b4ff74757 [file] [log] [blame]
Martin Roth3b2653b2013-02-24 10:46:11 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <device/pci_def.h>
21#include <device/device.h>
22#include <stdlib.h>
23#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
24
25/* warning: Porting.h includes an open #pragma pack(1) */
26#include "Porting.h"
27#include "AGESA.h"
28#include "amdlib.h"
Martin Roth3b2653b2013-02-24 10:46:11 -070029#include "chip.h"
30
Kyösti Mälkkia1ebbc42014-10-17 22:33:22 +030031#include <northbridge/amd/agesa/dimmSpd.h>
32
Martin Roth3b2653b2013-02-24 10:46:11 -070033/* uncomment for source level debug - GDB gets really confused otherwise. */
34//#pragma optimize ("", off)
35
36/**
Edward O'Callaghanae5fd342014-11-20 19:58:09 +110037 * Gets the SMBus address for an SPD from the array in devicetree.cb
Martin Roth3b2653b2013-02-24 10:46:11 -070038 * then read the SPD into the supplied buffer.
39 */
Kyösti Mälkkia1ebbc42014-10-17 22:33:22 +030040AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
Martin Roth3b2653b2013-02-24 10:46:11 -070041{
42 UINT8 spdAddress;
Martin Roth3b2653b2013-02-24 10:46:11 -070043
Edward O'Callaghanae5fd342014-11-20 19:58:09 +110044 ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
45 if (dev == NULL)
Martin Roth3b2653b2013-02-24 10:46:11 -070046 return AGESA_ERROR;
47
Edward O'Callaghanae5fd342014-11-20 19:58:09 +110048 ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info;
49 if (config == NULL)
50 return AGESA_ERROR;
51
Martin Roth3b2653b2013-02-24 10:46:11 -070052 if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup))
53 return AGESA_ERROR;
54 if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0]))
55 return AGESA_ERROR;
56 if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0]))
57 return AGESA_ERROR;
58
59 spdAddress = config->spdAddrLookup
60 [info->SocketId][info->MemChannelId][info->DimmId];
61
62 if (spdAddress == 0)
63 return AGESA_ERROR;
Kyösti Mälkkia1ebbc42014-10-17 22:33:22 +030064
65 int err = smbus_readSpd(spdAddress, (void *) info->Buffer, 128);
66 if (err)
67 return AGESA_ERROR;
68 return AGESA_SUCCESS;
Martin Roth3b2653b2013-02-24 10:46:11 -070069}