blob: 479e24c5ae29307ff32af18782b0e65c3d8a03a9 [file] [log] [blame]
Yinghai Lu13f1c2a2005-07-08 02:49:49 +00001#include <stdint.h>
2#include <device/pci_def.h>
3#include <arch/io.h>
4#include <device/pnp_def.h>
5#include <arch/romcc_io.h>
6#include <cpu/x86/lapic.h>
Carl-Daniel Hailfinger2ee67792008-10-01 12:52:52 +00007#include <stdlib.h>
Patrick Georgi12584e22010-05-08 09:14:51 +00008#include <console/console.h>
Stefan Reinauerae5e11d2012-04-27 02:31:28 +02009#include "drivers/pc80/udelay_io.c"
Stefan Reinauerbcb8c972010-04-25 18:06:32 +000010#include "lib/delay.c"
stepan836ae292010-12-08 05:42:47 +000011#include "southbridge/intel/esb6300/early_smbus.c"
Uwe Hermann586470c2006-10-27 11:38:22 +000012#include "northbridge/intel/e7525/raminit.h"
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000013#include "superio/winbond/w83627hf/w83627hf.h"
14#include "cpu/x86/lapic/boot_cpu.c"
15#include "cpu/x86/mtrr/earlymtrr.c"
16#include "debug.c"
17#include "watchdog.c"
18#include "reset.c"
stepan8301d832010-12-08 07:07:33 +000019#include "superio/winbond/w83627hf/early_serial.c"
Uwe Hermann586470c2006-10-27 11:38:22 +000020#include "northbridge/intel/e7525/memory_initialized.c"
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000021#include "cpu/x86/bist.h"
Uwe Hermann6dc92f02010-11-21 11:36:03 +000022#include <spd.h>
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000023
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000024#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
25#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
Uwe Hermann9b9791c2010-12-06 18:17:01 +000026#define DUMMY_DEV PNP_DEV(0x2e, 0)
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000027
28#define DEVPRES_CONFIG ( \
29 DEVPRES_D1F0 | \
30 DEVPRES_D2F0 | \
31 DEVPRES_D3F0 | \
32 DEVPRES_D4F0 | \
33 DEVPRES_D6F0 | \
34 0 )
35#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
36
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000037static inline int spd_read_byte(unsigned device, unsigned address)
38{
39 return smbus_read_byte(device, address);
40}
41
Uwe Hermann586470c2006-10-27 11:38:22 +000042#include "northbridge/intel/e7525/raminit.c"
Stefan Reinauerc13093b2009-09-23 18:51:03 +000043#include "lib/generic_sdram.c"
Stefan Reinauer8677a232010-12-11 20:33:41 +000044#include "arch/x86/lib/stages.c"
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000045
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000046static void main(unsigned long bist)
47{
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000048 static const struct mem_controller mch[] = {
49 {
50 .node_id = 0,
51 .f0 = PCI_DEV(0, 0x00, 0),
52 .f1 = PCI_DEV(0, 0x00, 1),
53 .f2 = PCI_DEV(0, 0x00, 2),
54 .f3 = PCI_DEV(0, 0x00, 3),
Uwe Hermann6dc92f02010-11-21 11:36:03 +000055 .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
56 .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000057 }
58 };
59
60 if (bist == 0) {
61 /* Skip this if there was a built in self test failure */
62 early_mtrr_init();
Uwe Hermann7b997052010-11-21 22:47:22 +000063 if (memory_initialized())
Stefan Reinauerd41a0bc2010-04-09 13:33:59 +000064 skip_romstage();
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000065 }
Uwe Hermann57b2ff82010-11-21 17:29:59 +000066
Uwe Hermann9b9791c2010-12-06 18:17:01 +000067 w83627hf_set_clksel_48(DUMMY_DEV);
68 w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000069 console_init();
70
71 /* MOVE ME TO A BETTER LOCATION !!! */
72 /* config LPC decode for flash memory access */
73 device_t dev;
74 dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
Uwe Hermann7b997052010-11-21 22:47:22 +000075 if (dev == PCI_DEV_INVALID)
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000076 die("Missing 6300ESB?");
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000077 pci_write_config32(dev, 0xe8, 0x00000000);
78 pci_write_config8(dev, 0xf0, 0x00);
79
80#if 0
81 display_cpuid_update_microcode();
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000082 print_pci_devices();
83#endif
84#if 1
85 enable_smbus();
86#endif
87#if 0
88 int i;
Uwe Hermann7b997052010-11-21 22:47:22 +000089 for(i = 0; i < 1; i++)
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000090 dump_spd_registers();
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000091#endif
92 disable_watchdogs();
Carl-Daniel Hailfinger2ee67792008-10-01 12:52:52 +000093 sdram_initialize(ARRAY_SIZE(mch), mch);
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000094#if 1
95 dump_pci_device(PCI_DEV(0, 0x00, 0));
96// dump_bar14(PCI_DEV(0, 0x00, 0));
97#endif
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000098}