Furquan Shaikh | ae2cf49 | 2018-11-21 14:02:59 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2018 Google LLC |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <baseboard/gpio.h> |
| 17 | #include <baseboard/variants.h> |
| 18 | #include <gpio.h> |
| 19 | #include <soc/gpio.h> |
| 20 | |
| 21 | /* GPIOs needed prior to ramstage. */ |
| 22 | static const struct pad_config early_gpio_table[] = { |
| 23 | PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */ |
| 24 | /* GSPI0_INT */ |
| 25 | PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, |
| 26 | DISPUPD), /* H1_PCH_INT_ODL */ |
| 27 | /* GSPI0_CLK */ |
| 28 | PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */ |
| 29 | /* GSPI0_CS# */ |
| 30 | PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L_R */ |
| 31 | /* GSPI0_MISO */ |
| 32 | PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */ |
| 33 | /* GSPI0_MOSI */ |
| 34 | PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ |
| 35 | |
| 36 | /* Enable power to wifi early in bootblock and de-assert PERST#. */ |
| 37 | PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ |
| 38 | PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */ |
| 39 | |
| 40 | /* |
| 41 | * ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak |
| 42 | * pull-up for proper operation. Since there is no external pull present |
| 43 | * on this platform, configure an internal weak pull-up. |
| 44 | */ |
| 45 | PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1, |
| 46 | ENPU), /* ESPI_IO1 */ |
| 47 | }; |
| 48 | |
| 49 | const struct pad_config *variant_early_gpio_table(size_t *num) |
| 50 | { |
| 51 | *num = ARRAY_SIZE(early_gpio_table); |
| 52 | return early_gpio_table; |
| 53 | } |