Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2005 Linux Networx |
| 5 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 6 | * Copyright (C) 2005 Ronald G. Minnich <rminnich@gmail.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 16 | */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 17 | |
| 18 | #include <console/console.h> |
| 19 | #include <device/device.h> |
| 20 | #include <device/pci.h> |
| 21 | #include <device/pci_ids.h> |
| 22 | #include <device/cardbus.h> |
| 23 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 24 | /* |
| 25 | * I don't think this code is quite correct but it is close. |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 26 | * Anyone with a cardbus bridge and a little time should be able |
| 27 | * to make it usable quickly. -- Eric Biederman 24 March 2005 |
| 28 | */ |
| 29 | |
| 30 | /* |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 31 | * IO should be max 256 bytes. However, since we may have a P2P bridge below |
| 32 | * a cardbus bridge, we need 4K. |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 33 | */ |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 34 | #define CARDBUS_IO_SIZE 4096 |
| 35 | #define CARDBUS_MEM_SIZE (32 * 1024 * 1024) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 36 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 37 | static void cardbus_record_bridge_resource(device_t dev, resource_t moving, |
| 38 | resource_t min_size, unsigned int index, unsigned long type) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 39 | { |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 40 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 41 | unsigned long gran; |
| 42 | resource_t step; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 43 | |
| 44 | /* Initialize the constraints on the current bus. */ |
Myles Watson | 03adcfd | 2010-06-07 16:51:11 +0000 | [diff] [blame] | 45 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 46 | if (!moving) |
| 47 | return; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 48 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 49 | resource = new_resource(dev, index); |
| 50 | resource->size = 0; |
| 51 | gran = 0; |
| 52 | step = 1; |
| 53 | while ((moving & step) == 0) { |
| 54 | gran += 1; |
| 55 | step <<= 1; |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 56 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 57 | resource->gran = gran; |
| 58 | resource->align = gran; |
| 59 | resource->limit = moving | (step - 1); |
| 60 | resource->flags = type; |
| 61 | |
| 62 | /* Don't let the minimum size exceed what we can put in the resource. */ |
| 63 | if ((min_size - 1) > resource->limit) |
| 64 | min_size = resource->limit + 1; |
| 65 | |
| 66 | resource->size = min_size; |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 67 | } |
| 68 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 69 | static void cardbus_size_bridge_resource(device_t dev, unsigned int index) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 70 | { |
| 71 | struct resource *resource; |
| 72 | resource_t min_size; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 73 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 74 | resource = find_resource(dev, index); |
| 75 | if (resource) { |
| 76 | min_size = resource->size; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 77 | /* |
| 78 | * Always allocate at least the miniumum size to a |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 79 | * cardbus bridge in case a new card is plugged in. |
| 80 | */ |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 81 | if (resource->size < min_size) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 82 | resource->size = min_size; |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 83 | } |
| 84 | } |
| 85 | |
| 86 | void cardbus_read_resources(device_t dev) |
| 87 | { |
| 88 | resource_t moving_base, moving_limit, moving; |
| 89 | unsigned long type; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 90 | u16 ctl; |
Ronald G. Minnich | 43225bc | 2005-11-22 00:07:02 +0000 | [diff] [blame] | 91 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 92 | /* See if needs a card control registers base address. */ |
Ronald G. Minnich | 43225bc | 2005-11-22 00:07:02 +0000 | [diff] [blame] | 93 | |
| 94 | pci_get_resource(dev, PCI_BASE_ADDRESS_0); |
| 95 | |
| 96 | compact_resources(dev); |
| 97 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 98 | /* See which bridge I/O resources are implemented. */ |
| 99 | moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_0); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 100 | moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_0); |
| 101 | moving = moving_base & moving_limit; |
| 102 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 103 | /* Initialize the I/O space constraints on the current bus. */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 104 | cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE, |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 105 | PCI_CB_IO_BASE_0, IORESOURCE_IO); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 106 | cardbus_size_bridge_resource(dev, PCI_CB_IO_BASE_0); |
| 107 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 108 | /* See which bridge I/O resources are implemented. */ |
| 109 | moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_1); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 110 | moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_1); |
| 111 | moving = moving_base & moving_limit; |
| 112 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 113 | /* Initialize the I/O space constraints on the current bus. */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 114 | cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE, |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 115 | PCI_CB_IO_BASE_1, IORESOURCE_IO); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 116 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 117 | /* If I can, enable prefetch for mem0. */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 118 | ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); |
| 119 | ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; |
| 120 | ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; |
| 121 | ctl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; |
| 122 | pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctl); |
| 123 | ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); |
| 124 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 125 | /* See which bridge memory resources are implemented. */ |
| 126 | moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_0); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 127 | moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_0); |
| 128 | moving = moving_base & moving_limit; |
| 129 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 130 | /* Initialize the memory space constraints on the current bus. */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 131 | type = IORESOURCE_MEM; |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 132 | if (ctl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 133 | type |= IORESOURCE_PREFETCH; |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 134 | cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE, |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 135 | PCI_CB_MEMORY_BASE_0, type); |
| 136 | if (type & IORESOURCE_PREFETCH) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 137 | cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_0); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 138 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 139 | /* See which bridge memory resources are implemented. */ |
| 140 | moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_1); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 141 | moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_1); |
| 142 | moving = moving_base & moving_limit; |
| 143 | |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 144 | /* Initialize the memory space constraints on the current bus. */ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 145 | cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE, |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 146 | PCI_CB_MEMORY_BASE_1, IORESOURCE_MEM); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 147 | cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_1); |
| 148 | |
| 149 | compact_resources(dev); |
| 150 | } |
| 151 | |
| 152 | void cardbus_enable_resources(device_t dev) |
| 153 | { |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 154 | u16 ctrl; |
| 155 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 156 | ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 157 | ctrl |= (dev->link_list->bridge_ctrl & ( |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 158 | PCI_BRIDGE_CTL_PARITY | |
| 159 | PCI_BRIDGE_CTL_SERR | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 160 | PCI_BRIDGE_CTL_NO_ISA | |
| 161 | PCI_BRIDGE_CTL_VGA | |
| 162 | PCI_BRIDGE_CTL_MASTER_ABORT | |
| 163 | PCI_BRIDGE_CTL_BUS_RESET)); |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 164 | /* Error check */ |
| 165 | ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 166 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 167 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 168 | |
| 169 | pci_dev_enable_resources(dev); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 170 | } |
| 171 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 172 | struct device_operations default_cardbus_ops_bus = { |
| 173 | .read_resources = cardbus_read_resources, |
| 174 | .set_resources = pci_dev_set_resources, |
| 175 | .enable_resources = cardbus_enable_resources, |
Uwe Hermann | d453dd0 | 2010-10-18 00:00:57 +0000 | [diff] [blame] | 176 | .init = 0, |
| 177 | .scan_bus = pci_scan_bridge, |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 178 | .enable = 0, |
| 179 | .reset_bus = pci_bus_reset, |
| 180 | }; |