| david | ad038c1 | 2015-10-23 20:22:22 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Intel Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc. |
| 18 | */ |
| 19 | |
| 20 | #include <soc/ramstage.h> |
| 21 | #include "gpio.h" |
| 22 | |
| 23 | void mainboard_silicon_init_params(SILICON_INIT_UPD *params) |
| 24 | { |
| 25 | /* Configure pads prior to SiliconInit() in case there's any |
| 26 | * dependencies during hardware initialization. */ |
| 27 | gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); |
| 28 | } |