Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
Dinesh Gehlot | d910fec | 2022-12-25 13:00:04 +0000 | [diff] [blame] | 3 | #include <gpio.h> |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 4 | #include <intelblocks/pcr.h> |
| 5 | #include <soc/pcr_ids.h> |
| 6 | #include <soc/pmc.h> |
| 7 | |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 8 | #define DEFAULT_VW_BASE 0x10 |
| 9 | |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 10 | /* |
| 11 | * This file is created based on Intel Alder Lake Processor PCH Datasheet |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 12 | * Document number: 630094, Chapter number: 27 |
| 13 | * Document number: 630603, Chapter number: 16 |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 14 | */ |
| 15 | |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 16 | static const struct reset_mapping rst_map_gpp[] = { |
| 17 | { .logical = PAD_RESET(PWROK), .chipset = 0U << 30 }, |
| 18 | { .logical = PAD_RESET(DEEP), .chipset = 1U << 30 }, |
| 19 | { .logical = PAD_RESET(PLTRST), .chipset = 2U << 30 }, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 20 | }; |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 21 | static const struct reset_mapping rst_map_gpd[] = { |
| 22 | { .logical = PAD_RESET(PWROK), .chipset = 0U << 30 }, |
| 23 | { .logical = PAD_RESET(DEEP), .chipset = 1U << 30 }, |
| 24 | { .logical = PAD_RESET(PLTRST), .chipset = 2U << 30 }, |
| 25 | { .logical = PAD_RESET(RSMRST), .chipset = 3U << 30 }, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 26 | }; |
| 27 | |
| 28 | /* |
| 29 | * The GPIO pinctrl driver for Alder Lake on Linux expects 32 GPIOs per pad |
| 30 | * group, regardless of whether or not there is a physical pad for each |
| 31 | * exposed GPIO number. |
| 32 | * |
| 33 | * This results in the OS having a sparse GPIO map, and devices that need |
| 34 | * to export an ACPI GPIO must use the OS expected number. |
| 35 | * |
| 36 | * Not all pins are usable as GPIO and those groups do not have a pad base. |
| 37 | */ |
| 38 | static const struct pad_group adl_community0_groups[] = { |
| 39 | INTEL_GPP_BASE(GPP_B0, GPP_B0, GPP_B25, 0), /* GPP_B */ |
| 40 | INTEL_GPP_BASE(GPP_B0, GPP_T0, GPP_T15, 32), /* GPP_T */ |
| 41 | INTEL_GPP_BASE(GPP_B0, GPP_A0, GPP_ESPI_CLK_LOOPBK, 64), /* GPP_A */ |
| 42 | }; |
| 43 | |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 44 | static const struct vw_entries adl_community0_vw[] = { |
| 45 | {GPP_A0, GPP_A23}, |
| 46 | {GPP_B0, GPP_B23}, |
| 47 | }; |
| 48 | |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 49 | #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N) |
| 50 | static const struct pad_group adl_community1_groups[] = { |
| 51 | INTEL_GPP_BASE(GPP_S0, GPP_S0, GPP_S7, 96), /* GPP_S */ |
| 52 | INTEL_GPP_BASE(GPP_S0, GPP_I0, GPP_I19, 128), /* GPP_I */ |
| 53 | INTEL_GPP_BASE(GPP_S0, GPP_H0, GPP_H23, 160), /* GPP_H */ |
| 54 | INTEL_GPP_BASE(GPP_S0, GPP_D0, GPP_GSPI2_CLK_LOOPBK, 192), /* GPP_D */ |
| 55 | INTEL_GPP(GPP_S0, GPP_VGPIO_0, GPP_VGPIO_THC1), /* vGPIO */ |
| 56 | }; |
| 57 | #else |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 58 | static const struct pad_group adl_community1_groups[] = { |
| 59 | INTEL_GPP_BASE(GPP_S0, GPP_S0, GPP_S7, 96), /* GPP_S */ |
| 60 | INTEL_GPP_BASE(GPP_S0, GPP_H0, GPP_H23, 128), /* GPP_H */ |
| 61 | INTEL_GPP_BASE(GPP_S0, GPP_D0, GPP_GSPI2_CLK_LOOPBK, 160), /* GPP_D */ |
Maulik V Vaghela | 63e34c4 | 2021-06-07 19:33:46 +0530 | [diff] [blame] | 62 | INTEL_GPP(GPP_S0, GPP_CPU_RSVD_1, GPP_CPU_RSVD_24), /* GPP_CPU_RSVD */ |
| 63 | INTEL_GPP(GPP_S0, GPP_VGPIO_0, GPP_VGPIO_37), /* vGPIO */ |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 64 | }; |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 65 | #endif |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 66 | |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 67 | static const struct vw_entries adl_community1_vw[] = { |
| 68 | {GPP_D0, GPP_D19}, |
| 69 | {GPP_H0, GPP_H23}, |
| 70 | }; |
| 71 | |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 72 | /* This community is not visible to the OS */ |
| 73 | static const struct pad_group adl_community2_groups[] = { |
| 74 | INTEL_GPP(GPD0, GPD0, GPD_DRAM_RESETB), /* GPD */ |
| 75 | }; |
| 76 | |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 77 | /* This community is not visible to the OS */ |
| 78 | static const struct pad_group adl_community3_groups[] = { |
Maulik V Vaghela | 63e34c4 | 2021-06-07 19:33:46 +0530 | [diff] [blame] | 79 | INTEL_GPP(GPP_CPU_RSVD_25, GPP_CPU_RSVD_25, GPP_vGPIO_PCIE_83), /* vGPIO_PCIE */ |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 80 | }; |
Maulik V Vaghela | 63e34c4 | 2021-06-07 19:33:46 +0530 | [diff] [blame] | 81 | |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 82 | static const struct pad_group adl_community4_groups[] = { |
| 83 | INTEL_GPP_BASE(GPP_C0, GPP_C0, GPP_C23, 256), /* GPP_C */ |
| 84 | INTEL_GPP_BASE(GPP_C0, GPP_F0, GPP_F_CLK_LOOPBK, 288), /* GPP_F */ |
| 85 | INTEL_GPP(GPP_C0, GPP_L_BKLTEN, GPP_MLK_RSTB), /* GPP_HVMOS */ |
| 86 | INTEL_GPP_BASE(GPP_C0, GPP_E0, GPP_E_CLK_LOOPBK, 320), /* GPP_E */ |
| 87 | }; |
| 88 | |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 89 | static const struct vw_entries adl_community4_vw[] = { |
| 90 | {GPP_F0, GPP_F23}, |
| 91 | {GPP_C0, GPP_C23}, |
| 92 | {GPP_E0, GPP_E23}, |
| 93 | }; |
| 94 | |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 95 | static const struct pad_group adl_community5_groups[] = { |
| 96 | INTEL_GPP_BASE(GPP_R0, GPP_R0, GPP_R7, 352), /* GPP_R */ |
| 97 | INTEL_GPP(GPP_R0, GPP_SPI0_IO_2, GPP_SPI0_CLK), /* GPP_SPI0 */ |
| 98 | }; |
| 99 | |
| 100 | static const struct pad_community adl_communities[] = { |
| 101 | [COMM_0] = { /* GPP B, T, A */ |
| 102 | .port = PID_GPIOCOM0, |
Deepti Deshatty | 8386e7c | 2021-05-12 16:09:07 +0530 | [diff] [blame] | 103 | .cpu_port = PID_CPU_GPIOCOM0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 104 | .first_pad = GPIO_COM0_START, |
| 105 | .last_pad = GPIO_COM0_END, |
| 106 | .num_gpi_regs = NUM_GPIO_COM0_GPI_REGS, |
| 107 | .pad_cfg_base = PAD_CFG_BASE, |
Nick Vaccaro | 4010d4a | 2021-10-13 20:31:27 -0700 | [diff] [blame] | 108 | .pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 109 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 110 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 111 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 112 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 113 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 114 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 115 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 116 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 117 | .name = "GPP_BTA", |
| 118 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 119 | .reset_map = rst_map_gpp, |
| 120 | .num_reset_vals = ARRAY_SIZE(rst_map_gpp), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 121 | .groups = adl_community0_groups, |
| 122 | .num_groups = ARRAY_SIZE(adl_community0_groups), |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 123 | .vw_base = DEFAULT_VW_BASE, |
| 124 | .vw_entries = adl_community0_vw, |
| 125 | .num_vw_entries = ARRAY_SIZE(adl_community0_vw), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 126 | }, |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 127 | [COMM_1] = { /* GPP S, D, H for ADL-P/M |
| 128 | GPP S, I, D, H for ADL-N */ |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 129 | .port = PID_GPIOCOM1, |
Deepti Deshatty | 8386e7c | 2021-05-12 16:09:07 +0530 | [diff] [blame] | 130 | .cpu_port = PID_CPU_GPIOCOM1, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 131 | .first_pad = GPIO_COM1_START, |
| 132 | .last_pad = GPIO_COM1_END, |
| 133 | .num_gpi_regs = NUM_GPIO_COM1_GPI_REGS, |
| 134 | .pad_cfg_base = PAD_CFG_BASE, |
Nick Vaccaro | 4010d4a | 2021-10-13 20:31:27 -0700 | [diff] [blame] | 135 | .pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 136 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 137 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 138 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 139 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 140 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 141 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 142 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 143 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 144 | #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N) |
| 145 | .name = "GPP_SIHD", |
| 146 | #else |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 147 | .name = "GPP_SDH", |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 148 | #endif |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 149 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 150 | .reset_map = rst_map_gpp, |
| 151 | .num_reset_vals = ARRAY_SIZE(rst_map_gpp), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 152 | .groups = adl_community1_groups, |
| 153 | .num_groups = ARRAY_SIZE(adl_community1_groups), |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 154 | .vw_base = DEFAULT_VW_BASE, |
| 155 | .vw_entries = adl_community1_vw, |
| 156 | .num_vw_entries = ARRAY_SIZE(adl_community1_vw), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 157 | }, |
| 158 | [COMM_2] = { /* GPD */ |
| 159 | .port = PID_GPIOCOM2, |
| 160 | .first_pad = GPIO_COM2_START, |
| 161 | .last_pad = GPIO_COM2_END, |
| 162 | .num_gpi_regs = NUM_GPIO_COM2_GPI_REGS, |
| 163 | .pad_cfg_base = PAD_CFG_BASE, |
Nick Vaccaro | 4010d4a | 2021-10-13 20:31:27 -0700 | [diff] [blame] | 164 | .pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 165 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 166 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 167 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 168 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 169 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 170 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 171 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 172 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 173 | .name = "GPD", |
| 174 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 175 | .reset_map = rst_map_gpd, |
| 176 | .num_reset_vals = ARRAY_SIZE(rst_map_gpd), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 177 | .groups = adl_community2_groups, |
| 178 | .num_groups = ARRAY_SIZE(adl_community2_groups), |
| 179 | }, |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 180 | [COMM_3] = { /* vGPIO */ |
| 181 | .port = PID_GPIOCOM3, |
Deepti Deshatty | 8386e7c | 2021-05-12 16:09:07 +0530 | [diff] [blame] | 182 | .cpu_port = PID_CPU_GPIOCOM3, |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 183 | .first_pad = GPIO_COM3_START, |
| 184 | .last_pad = GPIO_COM3_END, |
| 185 | .num_gpi_regs = NUM_GPIO_COM3_GPI_REGS, |
| 186 | .pad_cfg_base = PAD_CFG_BASE, |
| 187 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 188 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 189 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 190 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 191 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 192 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 193 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 194 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 195 | .name = "GPP_VGPIO", |
| 196 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 197 | .reset_map = rst_map_gpp, |
| 198 | .num_reset_vals = ARRAY_SIZE(rst_map_gpp), |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 199 | .groups = adl_community3_groups, |
| 200 | .num_groups = ARRAY_SIZE(adl_community3_groups), |
| 201 | }, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 202 | [COMM_4] = { /* GPP F, C, HVMOS, E */ |
| 203 | .port = PID_GPIOCOM4, |
Deepti Deshatty | 8386e7c | 2021-05-12 16:09:07 +0530 | [diff] [blame] | 204 | .cpu_port = PID_CPU_GPIOCOM4, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 205 | .first_pad = GPIO_COM4_START, |
| 206 | .last_pad = GPIO_COM4_END, |
| 207 | .num_gpi_regs = NUM_GPIO_COM4_GPI_REGS, |
| 208 | .pad_cfg_base = PAD_CFG_BASE, |
Nick Vaccaro | 4010d4a | 2021-10-13 20:31:27 -0700 | [diff] [blame] | 209 | .pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 210 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 211 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 212 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 213 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 214 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 215 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 216 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 217 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 218 | .name = "GPP_FCE", |
| 219 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 220 | .reset_map = rst_map_gpp, |
| 221 | .num_reset_vals = ARRAY_SIZE(rst_map_gpp), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 222 | .groups = adl_community4_groups, |
| 223 | .num_groups = ARRAY_SIZE(adl_community4_groups), |
Deepti Deshatty | bfa6043 | 2021-05-12 16:34:21 +0530 | [diff] [blame] | 224 | .vw_base = DEFAULT_VW_BASE, |
| 225 | .vw_entries = adl_community4_vw, |
| 226 | .num_vw_entries = ARRAY_SIZE(adl_community4_vw), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 227 | }, |
| 228 | [COMM_5] = { /* GPP R, SPI0 */ |
| 229 | .port = PID_GPIOCOM5, |
Deepti Deshatty | 8386e7c | 2021-05-12 16:09:07 +0530 | [diff] [blame] | 230 | .cpu_port = PID_CPU_GPIOCOM5, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 231 | .first_pad = GPIO_COM5_START, |
| 232 | .last_pad = GPIO_COM5_END, |
| 233 | .num_gpi_regs = NUM_GPIO_COM5_GPI_REGS, |
| 234 | .pad_cfg_base = PAD_CFG_BASE, |
Nick Vaccaro | 4010d4a | 2021-10-13 20:31:27 -0700 | [diff] [blame] | 235 | .pad_cfg_lock_offset = PAD_CFG_LOCK_OFFSET, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 236 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
| 237 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 238 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Maulik V Vaghela | afe8409 | 2022-05-06 10:27:50 +0530 | [diff] [blame] | 239 | .gpi_gpe_sts_reg_0 = GPI_GPE_STS_0, |
| 240 | .gpi_gpe_en_reg_0 = GPI_GPE_EN_0, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 241 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 242 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 243 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 244 | .name = "GPP_RSPI0", |
| 245 | .acpi_path = "\\_SB.PCI0.GPIO", |
Subrata Banik | 90c6cff | 2022-01-05 11:13:36 +0000 | [diff] [blame] | 246 | .reset_map = rst_map_gpp, |
| 247 | .num_reset_vals = ARRAY_SIZE(rst_map_gpp), |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 248 | .groups = adl_community5_groups, |
| 249 | .num_groups = ARRAY_SIZE(adl_community5_groups), |
| 250 | } |
| 251 | }; |
| 252 | |
| 253 | const struct pad_community *soc_gpio_get_community(size_t *num_communities) |
| 254 | { |
| 255 | *num_communities = ARRAY_SIZE(adl_communities); |
| 256 | return adl_communities; |
| 257 | } |
| 258 | |
| 259 | const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) |
| 260 | { |
| 261 | static const struct pmc_to_gpio_route routes[] = { |
| 262 | { PMC_GPP_B, GPP_B }, |
| 263 | { PMC_GPP_T, GPP_T }, |
| 264 | { PMC_GPP_A, GPP_A }, |
| 265 | { PMC_GPP_S, GPP_S }, |
Krishna Prasad Bhat | b627964 | 2022-01-14 11:42:02 +0530 | [diff] [blame] | 266 | #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N) |
| 267 | { PMC_GPP_I, GPP_I }, |
| 268 | #endif |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 269 | { PMC_GPP_H, GPP_H }, |
| 270 | { PMC_GPP_D, GPP_D }, |
| 271 | { PMC_GPD, GPD }, |
| 272 | { PMC_GPP_C, GPP_C }, |
| 273 | { PMC_GPP_F, GPP_F }, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 274 | { PMC_GPP_E, GPP_E }, |
| 275 | { PMC_GPP_R, GPP_R }, |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 276 | }; |
| 277 | *num = ARRAY_SIZE(routes); |
| 278 | return routes; |
Maulik V Vaghela | e6e8b3d | 2021-04-30 17:11:02 +0530 | [diff] [blame] | 279 | }; |