Patrick Georgi | 02363b5 | 2020-05-05 20:48:50 +0200 | [diff] [blame] | 1 | /* This file is part of the coreboot project. */ |
Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame^] | 2 | /* SPDX-License-Identifier: GPL-2.0-only */ |
T Michael Turney | 7783c60 | 2019-10-09 07:04:54 -0700 | [diff] [blame] | 3 | |
| 4 | #include <symbols.h> |
| 5 | #include <device/device.h> |
| 6 | #include <soc/mmu.h> |
| 7 | #include <soc/mmu_common.h> |
| 8 | #include <soc/symbols.h> |
Ravi Kumar Bokka | 6bbf8f2 | 2019-08-12 14:54:21 +0530 | [diff] [blame] | 9 | #include <soc/aop.h> |
T Michael Turney | 7783c60 | 2019-10-09 07:04:54 -0700 | [diff] [blame] | 10 | |
| 11 | static void soc_read_resources(struct device *dev) |
| 12 | { |
| 13 | ram_resource(dev, 0, (uintptr_t)ddr_region->offset / KiB, |
| 14 | ddr_region->size / KiB); |
Ravi Kumar Bokka | 6bbf8f2 | 2019-08-12 14:54:21 +0530 | [diff] [blame] | 15 | reserved_ram_resource(dev, 1, (uintptr_t)_dram_aop / KiB, |
| 16 | REGION_SIZE(dram_aop) / KiB); |
| 17 | reserved_ram_resource(dev, 2, (uintptr_t)_dram_soc / KiB, |
T Michael Turney | 7783c60 | 2019-10-09 07:04:54 -0700 | [diff] [blame] | 18 | REGION_SIZE(dram_soc) / KiB); |
| 19 | } |
| 20 | |
| 21 | static void soc_init(struct device *dev) |
| 22 | { |
Ravi Kumar Bokka | 6bbf8f2 | 2019-08-12 14:54:21 +0530 | [diff] [blame] | 23 | aop_fw_load_reset(); |
T Michael Turney | 7783c60 | 2019-10-09 07:04:54 -0700 | [diff] [blame] | 24 | } |
| 25 | |
| 26 | static struct device_operations soc_ops = { |
| 27 | .read_resources = soc_read_resources, |
| 28 | .init = soc_init, |
| 29 | }; |
| 30 | |
| 31 | static void enable_soc_dev(struct device *dev) |
| 32 | { |
| 33 | dev->ops = &soc_ops; |
| 34 | } |
| 35 | |
| 36 | struct chip_operations soc_qualcomm_sc7180_ops = { |
| 37 | CHIP_NAME("SOC Qualcomm SC7180") |
| 38 | .enable_dev = enable_soc_dev, |
| 39 | }; |