blob: 9d92b831cb70a6f60c2c40d9f025c30afc0c0892 [file] [log] [blame]
Myles Watsona643ea32008-10-06 21:00:46 +00001##
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002## This file is part of the coreboot project.
Myles Watsona643ea32008-10-06 21:00:46 +00003##
Yinghai Luf55b58d2007-02-17 14:28:11 +00004## Copyright (C) 2007 AMD
5## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
Myles Watsona643ea32008-10-06 21:00:46 +00006##
Yinghai Luf55b58d2007-02-17 14:28:11 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; either version 2 of the License, or
10## (at your option) any later version.
Myles Watsona643ea32008-10-06 21:00:46 +000011##
Yinghai Luf55b58d2007-02-17 14:28:11 +000012## This program is distributed in the hope that it will be useful,
13## but WITHOUT ANY WARRANTY; without even the implied warranty of
14## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15## GNU General Public License for more details.
Myles Watsona643ea32008-10-06 21:00:46 +000016##
Yinghai Luf55b58d2007-02-17 14:28:11 +000017## You should have received a copy of the GNU General Public License
18## along with this program; if not, write to the Free Software
19## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Myles Watsona643ea32008-10-06 21:00:46 +000020##
Yinghai Luf55b58d2007-02-17 14:28:11 +000021
22entries
23
24#start-bit length config config-ID name
25#0 8 r 0 seconds
26#8 8 r 0 alarm_seconds
27#16 8 r 0 minutes
28#24 8 r 0 alarm_minutes
29#32 8 r 0 hours
30#40 8 r 0 alarm_hours
31#48 8 r 0 day_of_week
32#56 8 r 0 day_of_month
33#64 8 r 0 month
34#72 8 r 0 year
35#80 4 r 0 rate_select
36#84 3 r 0 REF_Clock
37#87 1 r 0 UIP
38#88 1 r 0 auto_switch_DST
39#89 1 r 0 24_hour_mode
40#90 1 r 0 binary_values_enable
41#91 1 r 0 square-wave_out_enable
42#92 1 r 0 update_finished_enable
43#93 1 r 0 alarm_interrupt_enable
44#94 1 r 0 periodic_interrupt_enable
45#95 1 r 0 disable_clock_updates
46#96 288 r 0 temporary_filler
470 384 r 0 reserved_memory
48384 1 e 4 boot_option
49385 1 e 4 last_boot
50386 1 e 1 ECC_memory
51388 4 r 0 reboot_bits
52392 3 e 5 baud_rate
53395 1 e 1 hw_scrubber
54396 1 e 1 interleave_chip_selects
55397 2 e 8 max_mem_clock
Myles Watsona643ea32008-10-06 21:00:46 +000056399 1 e 2 dual_core
Yinghai Luf55b58d2007-02-17 14:28:11 +000057400 1 e 1 power_on_after_fail
58412 4 e 6 debug_level
59416 4 e 7 boot_first
60420 4 e 7 boot_second
61424 4 e 7 boot_third
62428 4 h 0 boot_index
Myles Watsona643ea32008-10-06 21:00:46 +000063432 8 h 0 boot_countdown
Yinghai Luf55b58d2007-02-17 14:28:11 +000064440 4 e 9 slow_cpu
65444 1 e 1 nmi
66445 1 e 1 iommu
Luc Verhaegena9c5ea02009-06-03 14:19:33 +000067728 256 h 0 user_data
Yinghai Luf55b58d2007-02-17 14:28:11 +000068984 16 h 0 check_sum
69# Reserve the extended AMD configuration registers
701000 24 r 0 reserved_memory
71
72
73
74enumerations
75
76#ID value text
771 0 Disable
781 1 Enable
792 0 Enable
802 1 Disable
814 0 Fallback
824 1 Normal
835 0 115200
845 1 57600
855 2 38400
865 3 19200
875 4 9600
885 5 4800
895 6 2400
905 7 1200
916 6 Notice
926 7 Info
936 8 Debug
946 9 Spew
957 0 Network
967 1 HDD
977 2 Floppy
987 8 Fallback_Network
997 9 Fallback_HDD
1007 10 Fallback_Floppy
101#7 3 ROM
1028 0 200Mhz
1038 1 166Mhz
1048 2 133Mhz
1058 3 100Mhz
1069 0 off
1079 1 87.5%
1089 2 75.0%
1099 3 62.5%
1109 4 50.0%
1119 5 37.5%
1129 6 25.0%
1139 7 12.5%
114
115checksums
116
117checksum 392 983 984
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