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Eric Biederman8ca8d762003-04-22 19:02:15 +00001#ifndef PC80_MC146818RTC_H
2#define PC80_MC146818RTC_H
3
4#ifndef RTC_BASE_PORT
5#define RTC_BASE_PORT 0x70
6#endif
7
8#define RTC_PORT(x) (RTC_BASE_PORT + (x))
9
Eric Biederman8ca8d762003-04-22 19:02:15 +000010/* control registers - Moto names
11 */
12#define RTC_REG_A 10
13#define RTC_REG_B 11
14#define RTC_REG_C 12
15#define RTC_REG_D 13
16
17
18/**********************************************************************
19 * register details
20 **********************************************************************/
21#define RTC_FREQ_SELECT RTC_REG_A
22
23/* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
24 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
25 * totalling to a max high interval of 2.228 ms.
26 */
27# define RTC_UIP 0x80
28# define RTC_DIV_CTL 0x70
29 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
30# define RTC_REF_CLCK_4MHZ 0x00
31# define RTC_REF_CLCK_1MHZ 0x10
32# define RTC_REF_CLCK_32KHZ 0x20
33 /* 2 values for divider stage reset, others for "testing purposes only" */
34# define RTC_DIV_RESET1 0x60
35# define RTC_DIV_RESET2 0x70
36 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
37# define RTC_RATE_SELECT 0x0F
38# define RTC_RATE_NONE 0x00
39# define RTC_RATE_32786HZ 0x01
40# define RTC_RATE_16384HZ 0x02
41# define RTC_RATE_8192HZ 0x03
42# define RTC_RATE_4096HZ 0x04
43# define RTC_RATE_2048HZ 0x05
44# define RTC_RATE_1024HZ 0x06
45# define RTC_RATE_512HZ 0x07
46# define RTC_RATE_256HZ 0x08
47# define RTC_RATE_128HZ 0x09
48# define RTC_RATE_64HZ 0x0a
49# define RTC_RATE_32HZ 0x0b
50# define RTC_RATE_16HZ 0x0c
51# define RTC_RATE_8HZ 0x0d
52# define RTC_RATE_4HZ 0x0e
53# define RTC_RATE_2HZ 0x0f
54
55/**********************************************************************/
56#define RTC_CONTROL RTC_REG_B
57# define RTC_SET 0x80 /* disable updates for clock setting */
58# define RTC_PIE 0x40 /* periodic interrupt enable */
59# define RTC_AIE 0x20 /* alarm interrupt enable */
60# define RTC_UIE 0x10 /* update-finished interrupt enable */
61# define RTC_SQWE 0x08 /* enable square-wave output */
62# define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
63# define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
64# define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
65
66/**********************************************************************/
67#define RTC_INTR_FLAGS RTC_REG_C
68/* caution - cleared by read */
69# define RTC_IRQF 0x80 /* any of the following 3 is active */
70# define RTC_PF 0x40
71# define RTC_AF 0x20
72# define RTC_UF 0x10
73
74/**********************************************************************/
75#define RTC_VALID RTC_REG_D
76# define RTC_VRT 0x80 /* valid RAM and time */
77/**********************************************************************/
78
Eric Biederman8ca8d762003-04-22 19:02:15 +000079/* On PCs, the checksum is built only over bytes 16..45 */
80#define PC_CKS_RANGE_START 16
81#define PC_CKS_RANGE_END 45
82#define PC_CKS_LOC 46
83
Eric Biederman5cd81732004-03-11 15:01:31 +000084/* Linux bios checksum is built only over bytes 49..125 */
85#ifndef LB_CKS_RANGE_START
Eric Biederman8ca8d762003-04-22 19:02:15 +000086#define LB_CKS_RANGE_START 49
Eric Biederman5cd81732004-03-11 15:01:31 +000087#endif
88#ifndef LB_CKS_RANGE_END
Eric Biederman8ca8d762003-04-22 19:02:15 +000089#define LB_CKS_RANGE_END 125
Eric Biederman5cd81732004-03-11 15:01:31 +000090#endif
91#ifndef LB_CKS_LOC
Eric Biederman8ca8d762003-04-22 19:02:15 +000092#define LB_CKS_LOC 126
Eric Biederman5cd81732004-03-11 15:01:31 +000093#endif
Eric Biederman8ca8d762003-04-22 19:02:15 +000094
95#if !defined(ASSEMBLY)
96void rtc_init(int invalid);
Luc Verhaegena9c5ea02009-06-03 14:19:33 +000097#if USE_OPTION_TABLE == 1
98int get_option(void *dest, char *name);
99#else
100static inline int get_option(void *dest, char *name) { return -2; }
101#endif
Eric Biederman8ca8d762003-04-22 19:02:15 +0000102#endif
103
104#endif /* PC80_MC146818RTC_H */