| Angel Pons | 09481b1 | 2020-04-03 01:21:13 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 2 | |
| Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
| Kyösti Mälkki | 3855c01 | 2019-03-03 08:45:19 +0200 | [diff] [blame] | 4 | #include <device/pnp_ops.h> |
| Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 5 | #include <southbridge/intel/bd82x6x/pch.h> |
| Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 6 | #include <superio/nuvoton/nct6776/nct6776.h> |
| 7 | #include <superio/nuvoton/common/nuvoton.h> |
| 8 | |
| 9 | #define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1) |
| 10 | |
| Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 11 | void bootblock_mainboard_early_init(void) |
| Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 12 | { |
| 13 | /* Set GPIOs on superio, enable UART */ |
| 14 | nuvoton_pnp_enter_conf_state(SERIAL_DEV); |
| 15 | pnp_set_logical_device(SERIAL_DEV); |
| 16 | |
| 17 | pnp_write_config(SERIAL_DEV, 0x1c, 0x80); |
| 18 | pnp_write_config(SERIAL_DEV, 0x27, 0x80); |
| 19 | pnp_write_config(SERIAL_DEV, 0x2a, 0x60); |
| 20 | |
| 21 | nuvoton_pnp_exit_conf_state(SERIAL_DEV); |
| 22 | |
| 23 | nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
| 24 | } |