| Tim Crawford | d7a476c | 2023-03-02 09:17:59 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <soc/meminit.h> |
| 4 | #include <soc/romstage.h> |
| 5 | |
| 6 | void mainboard_memory_init_params(FSPM_UPD *mupd) |
| 7 | { |
| 8 | const struct mb_cfg board_cfg = { |
| 9 | .type = MEM_TYPE_DDR4, |
| 10 | }; |
| 11 | const struct mem_spd spd_info = { |
| 12 | .topo = MEM_TOPO_MIXED, |
| 13 | .cbfs_index = 0, |
| 14 | .smbus[1] = { .addr_dimm[0] = 0x52, }, |
| 15 | }; |
| 16 | const bool half_populated = false; |
| 17 | |
| Tim Crawford | d7a476c | 2023-03-02 09:17:59 -0700 | [diff] [blame] | 18 | mupd->FspmConfig.DmiMaxLinkSpeed = 4; |
| 19 | mupd->FspmConfig.GpioOverride = 0; |
| 20 | |
| 21 | memcfg_init(mupd, &board_cfg, &spd_info, half_populated); |
| 22 | } |