Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 1 | chip soc/intel/apollolake |
| 2 | |
| 3 | device cpu_cluster 0 on |
| 4 | device lapic 0 on end |
| 5 | end |
| 6 | |
| 7 | register "sci_irq" = "SCIS_IRQ10" |
| 8 | |
Mario Scheithauer | 8725c0a | 2020-10-01 12:49:50 +0200 | [diff] [blame] | 9 | # 0:HS400(Default), 1:HS200, 2:DDR50 |
| 10 | register "emmc_host_max_speed" = "1" |
| 11 | |
Werner Zeh | 1b81024 | 2019-11-11 14:17:27 +0100 | [diff] [blame] | 12 | # Enable Vtd feature |
| 13 | register "enable_vtd" = "1" |
| 14 | |
Werner Zeh | 45f4494 | 2021-04-27 11:40:17 +0200 | [diff] [blame] | 15 | # I2C0 controller used for RTC |
| 16 | register "common_soc_config" = "{ |
| 17 | .i2c[0] = { |
| 18 | .speed = I2C_SPEED_STANDARD, |
| 19 | .rise_time_ns = 40, |
| 20 | .fall_time_ns = 10, |
Werner Zeh | a67bda3 | 2021-05-31 07:15:36 +0200 | [diff] [blame^] | 21 | .data_hold_time_ns = 300, |
| 22 | .speed_config[0] = { |
| 23 | .speed = I2C_SPEED_FAST, |
| 24 | .scl_hcnt = 0x68, |
| 25 | .scl_lcnt = 0xd1, |
| 26 | .sda_hold = 0x28 |
| 27 | }, |
Werner Zeh | 45f4494 | 2021-04-27 11:40:17 +0200 | [diff] [blame] | 28 | } |
| 29 | }" |
| 30 | |
Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 31 | device domain 0 on |
| 32 | device pci 00.0 on end # - Host Bridge |
| 33 | device pci 00.1 off end # - DPTF |
| 34 | device pci 00.2 off end # - NPK |
| 35 | device pci 02.0 on end # - Gen - Display |
| 36 | device pci 03.0 off end # - Iunit |
| 37 | device pci 0d.0 on end # - P2SB |
| 38 | device pci 0d.1 off end # - PMC |
| 39 | device pci 0d.2 on end # - SPI |
| 40 | device pci 0d.3 off end # - Shared SRAM |
| 41 | device pci 0e.0 on end # - Audio |
Subrata Banik | e9b9373 | 2020-09-17 15:48:54 +0530 | [diff] [blame] | 42 | device pci 0f.0 on end # - CSE |
Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 43 | device pci 11.0 on end # - ISH |
| 44 | device pci 12.0 on end # - SATA |
Mario Scheithauer | 92e4ed1 | 2021-01-14 14:54:38 +0100 | [diff] [blame] | 45 | device pci 13.0 on # - RP 2 - PCIe A 0 |
| 46 | register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" |
| 47 | register "pcie_rp_hotplug_enable[2]" = "0" |
| 48 | end |
| 49 | device pci 13.1 on # - RP 3 - PCIe A 1 |
| 50 | register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" |
| 51 | register "pcie_rp_hotplug_enable[3]" = "0" |
| 52 | end |
| 53 | device pci 13.2 on # - RP 4 - PCIe-A 2 |
| 54 | register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" |
| 55 | register "pcie_rp_hotplug_enable[4]" = "0" |
| 56 | end |
| 57 | device pci 13.3 on # - RP 5 - PCIe-A 3 |
| 58 | register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" |
| 59 | register "pcie_rp_hotplug_enable[5]" = "0" |
| 60 | end |
| 61 | device pci 14.0 on # - RP 0 - PCIe-B 0 |
| 62 | register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED" |
| 63 | register "pcie_rp_hotplug_enable[0]" = "0" |
| 64 | end |
| 65 | device pci 14.1 on # - RP 1 - PCIe-B 1 |
| 66 | register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" |
| 67 | register "pcie_rp_hotplug_enable[1]" = "0" |
| 68 | end |
Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 69 | device pci 15.0 on end # - XHCI |
| 70 | device pci 15.1 off end # - XDCI |
| 71 | device pci 16.0 on # - I2C 0 |
| 72 | # Enable external RTC chip |
| 73 | chip drivers/i2c/rx6110sa |
| 74 | register "pmon_sampling" = "PMON_SAMPL_256_MS" |
| 75 | register "bks_on" = "0" |
| 76 | register "bks_off" = "1" |
| 77 | register "iocut_en" = "1" |
| 78 | register "set_user_date" = "1" |
| 79 | register "user_year" = "04" |
| 80 | register "user_month" = "07" |
| 81 | register "user_day" = "01" |
| 82 | register "user_weekday" = "4" |
| 83 | device i2c 0x32 on end # RTC RX6110 SA |
| 84 | end |
| 85 | end |
| 86 | device pci 16.1 off end # - I2C 1 |
| 87 | device pci 16.2 off end # - I2C 2 |
| 88 | device pci 16.3 off end # - I2C 3 |
| 89 | device pci 17.0 off end # - I2C 4 |
| 90 | device pci 17.1 off end # - I2C 5 |
| 91 | device pci 17.2 off end # - I2C 6 |
| 92 | device pci 17.3 off end # - I2C 7 |
| 93 | device pci 18.0 on end # - UART 0 |
| 94 | device pci 18.1 on end # - UART 1 |
| 95 | device pci 18.2 on end # - UART 2 |
| 96 | device pci 18.3 on end # - UART 3 |
| 97 | device pci 19.0 off end # - SPI 0 |
| 98 | device pci 19.1 off end # - SPI 1 |
| 99 | device pci 19.2 off end # - SPI 2 |
| 100 | device pci 1a.0 off end # - PWM |
Werner Zeh | a4b7bef | 2019-11-08 11:49:01 +0100 | [diff] [blame] | 101 | device pci 1b.0 on end # - SDCARD |
Mario Scheithauer | 8725c0a | 2020-10-01 12:49:50 +0200 | [diff] [blame] | 102 | device pci 1c.0 on end # - eMMC |
Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 103 | device pci 1d.0 off end # - UFS |
| 104 | device pci 1e.0 off end # - SDIO |
Elyes HAOUAS | bda27cd | 2020-06-27 07:17:16 +0200 | [diff] [blame] | 105 | device pci 1f.0 on # - LPC |
Werner Zeh | 9caadfe | 2019-11-08 11:51:33 +0100 | [diff] [blame] | 106 | chip drivers/pc80/tpm |
| 107 | device pnp 0c31.0 on end |
| 108 | end |
| 109 | end |
Werner Zeh | 0dc87ef | 2019-10-22 15:08:19 +0200 | [diff] [blame] | 110 | device pci 1f.1 on end # - SMBUS |
| 111 | end |
| 112 | end |