Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 3 | * |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 17 | #include <stdint.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <arch/io.h> |
| 21 | #include <device/pnp_def.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 22 | #include <console/console.h> |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 23 | #include <lib.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 24 | #include <northbridge/via/cx700/raminit.h> |
| 25 | #include <cpu/x86/bist.h> |
Kyösti Mälkki | 5276941 | 2016-06-17 07:55:03 +0300 | [diff] [blame] | 26 | #include <cpu/amd/car.h> |
Edward O'Callaghan | ebe3a7a | 2015-01-05 00:27:54 +1100 | [diff] [blame] | 27 | #include <delay.h> |
stepan | 8301d83 | 2010-12-08 07:07:33 +0000 | [diff] [blame] | 28 | #include "northbridge/via/cx700/early_smbus.c" |
Stefan Reinauer | c65666f | 2010-04-03 12:41:41 +0000 | [diff] [blame] | 29 | #include "lib/debug.c" |
stepan | 8301d83 | 2010-12-08 07:07:33 +0000 | [diff] [blame] | 30 | #include "northbridge/via/cx700/early_serial.c" |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 31 | #include "northbridge/via/cx700/raminit.c" |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 32 | #include <spd.h> |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 33 | |
| 34 | static void enable_mainboard_devices(void) |
| 35 | { |
Antonello Dettori | 50f1b1a | 2016-11-08 18:44:46 +0100 | [diff] [blame] | 36 | pci_devfn_t dev; |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 37 | |
| 38 | dev = pci_locate_device(PCI_ID(0x1106, 0x8324), 0); |
| 39 | if (dev == PCI_DEV_INVALID) { |
| 40 | die("LPC bridge not found!!!\n"); |
| 41 | } |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 42 | // Disable GP3 |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 43 | pci_write_config8(dev, 0x98, 0x00); |
| 44 | |
| 45 | // Disable mc97 |
| 46 | pci_write_config8(dev, 0x50, 0x80); |
| 47 | |
| 48 | // Disable internal KBC Configuration |
| 49 | pci_write_config8(dev, 0x51, 0x2d); |
| 50 | pci_write_config8(dev, 0x58, 0x42); |
| 51 | pci_write_config8(dev, 0x59, 0x80); |
| 52 | pci_write_config8(dev, 0x5b, 0x01); |
| 53 | |
| 54 | // Enable P2P Bridge Header for External PCI BUS. |
| 55 | dev = pci_locate_device(PCI_ID(0x1106, 0x324e), 0); |
| 56 | if (dev == PCI_DEV_INVALID) { |
| 57 | die("P2P bridge not found!!!\n"); |
| 58 | } |
| 59 | pci_write_config8(dev, 0x4f, 0x41); |
| 60 | |
| 61 | // Switch SATA to non-RAID mode |
| 62 | dev = pci_locate_device(PCI_ID(0x1106, 0x0581), 0); |
| 63 | if (dev != PCI_DEV_INVALID) { |
| 64 | pci_write_config16(dev, 0xBA, 0x5324); |
| 65 | } |
| 66 | } |
| 67 | |
| 68 | static void enable_shadow_ram(const struct mem_controller *ctrl) |
| 69 | { |
| 70 | u8 shadowreg; |
| 71 | |
| 72 | pci_write_config8(PCI_DEV(0, 0, 3), 0x80, 0x2a); |
| 73 | |
| 74 | /* 0xf0000-0xfffff - ACPI tables */ |
| 75 | shadowreg = pci_read_config8(PCI_DEV(0, 0, 3), 0x83); |
| 76 | shadowreg |= 0x30; |
| 77 | pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg); |
| 78 | } |
| 79 | |
Stefan Reinauer | 314e551 | 2010-04-09 20:36:29 +0000 | [diff] [blame] | 80 | void main(unsigned long bist) |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 81 | { |
| 82 | /* Set statically so it should work with cx700 as well */ |
| 83 | static const struct mem_controller cx700[] = { |
| 84 | { |
Uwe Hermann | d773fd3 | 2010-11-20 20:23:08 +0000 | [diff] [blame] | 85 | .channel0 = {DIMM0, DIMM1}, |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 86 | }, |
| 87 | }; |
| 88 | |
| 89 | enable_smbus(); |
| 90 | |
| 91 | enable_cx700_serial(); |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 92 | console_init(); |
| 93 | |
| 94 | /* Halt if there was a built in self test failure */ |
| 95 | report_bist_failure(bist); |
| 96 | |
| 97 | enable_mainboard_devices(); |
| 98 | |
| 99 | /* Allows access to all northbridge devices */ |
| 100 | pci_write_config8(PCI_DEV(0, 0, 0), 0x4f, 0x01); |
| 101 | |
| 102 | sdram_set_registers(cx700); |
| 103 | enable_shadow_ram(cx700); |
| 104 | sdram_enable(cx700); |
Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 105 | } |