Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2011-2013 Alexandru Gagniuc <mr.nuke.me@gmail.com> |
| 5 | ## |
| 6 | ## This program is free software: you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation, either version 2 of the License, or |
| 9 | ## (at your option) any later version. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 16 | |
| 17 | chip northbridge/via/vx900 # Northbridge |
| 18 | register "assign_pex_to_dp" = "0" |
| 19 | register "pcie_port1_2_lane_wide" = "1" |
| 20 | register "ext_int_route_to_pirq" = "'H'" |
| 21 | |
| 22 | device cpu_cluster 0 on # APIC cluster |
| 23 | chip cpu/via/nano # VIA NANO |
| 24 | device lapic 0 on end # APIC |
| 25 | end |
| 26 | end |
| 27 | device domain 0 on |
| 28 | device pci 0.0 on end # [0410] Host controller |
| 29 | device pci 0.1 on end # [1410] Error Reporting |
| 30 | device pci 0.2 on end # [2410] CPU Bus Control |
| 31 | device pci 0.3 on end # [3410] DRAM Bus Control |
| 32 | device pci 0.4 on end # [4410] Power Management |
| 33 | device pci 0.5 on # [5410] APIC+Traffic Control |
| 34 | chip drivers/generic/ioapic |
| 35 | register "have_isa_interrupts" = "0" |
| 36 | register "irq_on_fsb" = "1" |
| 37 | register "enable_virtual_wire" = "1" |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 38 | register "base" = "(void *)0xfecc0000" |
Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 39 | device ioapic 2 on end |
| 40 | end |
| 41 | end |
| 42 | device pci 0.6 off end # [6410] Scratch Registers |
| 43 | device pci 0.7 on end # [7410] V4 Link Control |
| 44 | device pci 1.0 on # [7122] VGA Chrome9 HD |
| 45 | ioapic_irq 2 INTA 0x28 |
| 46 | end |
| 47 | device pci 1.1 on # [9170] Audio Device |
| 48 | ioapic_irq 2 INTA 0x29 |
| 49 | end |
| 50 | device pci 3.0 on end # [a410] PEX1 |
| 51 | device pci 3.1 on end # [b410] PEX2 |
| 52 | device pci 3.2 on end # [c410] PEX3 |
| 53 | device pci 3.3 on end # [d410] PEX4 |
| 54 | device pci 3.4 on end # [e410] PCIE bridge |
| 55 | device pci b.0 on end # [a409] USB Device |
| 56 | device pci c.0 off end # [95d0] SDIO Host Controller |
| 57 | device pci d.0 off end # [9530] Memory Card controller |
| 58 | device pci f.0 on # [9001] SATA Controller |
| 59 | ioapic_irq 1 INTA 0x15 |
| 60 | end |
| 61 | device pci 10.0 on end # [3038] USB 1.1 |
| 62 | device pci 10.1 on end # [3038] USB 1.1 |
| 63 | device pci 10.2 on end # [3038] USB 1.1 |
| 64 | device pci 10.3 on end # [3038] USB 1.1 |
| 65 | device pci 10.4 on end # [3104] USB 2.0 |
| 66 | device pci 11.0 on # [8410] LPC Bus Control |
| 67 | chip drivers/generic/ioapic |
| 68 | register "have_isa_interrupts" = "1" |
| 69 | register "irq_on_fsb" = "1" |
| 70 | register "enable_virtual_wire" = "1" |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 71 | register "base" = "(void *)0xfec00000" |
Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 72 | device ioapic 1 on end |
| 73 | end |
| 74 | #chip drivers/generic/generic # DIMM 0 channel 1 |
| 75 | # device i2c 50 on end |
| 76 | #end |
| 77 | #chip drivers/generic/generic # DIMM 1 channel 1 |
| 78 | # device i2c 51 on end |
| 79 | #end |
| 80 | chip superio/fintek/f81865f # Super duper IO |
| 81 | device pnp 4e.0 off end # Floppy |
| 82 | device pnp 4e.3 off end # Parallel Port |
| 83 | device pnp 4e.4 off end # Hardware Monitor |
| 84 | device pnp 4e.5 off end # Keyboard not here |
| 85 | device pnp 4e.6 off end # GPIO |
| 86 | device pnp 4e.a off end # PME |
| 87 | device pnp 4e.10 on # COM1 |
| 88 | io 0x60 = 0x3f8 |
| 89 | irq 0x70 = 4 |
| 90 | end |
| 91 | device pnp 4e.11 on # COM2 |
| 92 | io 0x60 = 0x2f8 |
| 93 | irq 0x70 = 3 |
| 94 | end |
| 95 | device pnp 4e.12 on # COM3 |
| 96 | io 0x60 = 0x3e8 |
| 97 | irq 0x70 = 10 |
| 98 | end |
| 99 | device pnp 4e.13 on # COM4 |
| 100 | io 0x60 = 0x2e8 |
| 101 | irq 0x70 = 11 |
| 102 | end |
| 103 | end # superio/fintek/f81865f |
| 104 | end # LPC |
| 105 | device pci 11.7 on end # [a353] North-South control |
| 106 | device pci 14.0 on end # [3288] Azalia HDAC |
| 107 | end |
| 108 | end |