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Yinghai Luf55b58d2007-02-17 14:28:11 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luf55b58d2007-02-17 14:28:11 +00003 *
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Yinghai Luf55b58d2007-02-17 14:28:11 +000016 */
17
Yinghai Luf55b58d2007-02-17 14:28:11 +000018#include <console/console.h>
19#include <device/pci.h>
20#include <string.h>
21#include <stdint.h>
22#include <arch/pirq_routing.h>
23
24#include <cpu/amd/amdk8_sysconf.h>
25
Paul Menzel95fe8fb2016-07-28 17:20:20 +020026static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
27 uint8_t devfn, uint8_t link0, uint16_t bitmap0,
28 uint8_t link1, uint16_t bitmap1, uint8_t link2,
29 uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
30 uint8_t slot, uint8_t rfu)
Yinghai Luf55b58d2007-02-17 14:28:11 +000031{
Paul Menzel95fe8fb2016-07-28 17:20:20 +020032 pirq_info->bus = bus;
33 pirq_info->devfn = devfn;
34 pirq_info->irq[0].link = link0;
35 pirq_info->irq[0].bitmap = bitmap0;
36 pirq_info->irq[1].link = link1;
37 pirq_info->irq[1].bitmap = bitmap1;
38 pirq_info->irq[2].link = link2;
39 pirq_info->irq[2].bitmap = bitmap2;
40 pirq_info->irq[3].link = link3;
41 pirq_info->irq[3].bitmap = bitmap3;
42 pirq_info->slot = slot;
43 pirq_info->rfu = rfu;
Yinghai Luf55b58d2007-02-17 14:28:11 +000044}
Paul Menzel95fe8fb2016-07-28 17:20:20 +020045
Yinghai Luf55b58d2007-02-17 14:28:11 +000046extern unsigned char bus_isa;
Paul Menzel95fe8fb2016-07-28 17:20:20 +020047extern unsigned char bus_mcp55[8]; //1
Carl-Daniel Hailfingera5436c62008-12-22 17:41:01 +000048
Yinghai Luf55b58d2007-02-17 14:28:11 +000049unsigned long write_pirq_routing_table(unsigned long addr)
50{
51
52 struct irq_routing_table *pirq;
53 struct irq_info *pirq_info;
54 unsigned slot_num;
55 uint8_t *v;
56 unsigned sbdn;
57
Paul Menzel95fe8fb2016-07-28 17:20:20 +020058 uint8_t sum = 0;
59 int i;
Yinghai Luf55b58d2007-02-17 14:28:11 +000060
Paul Menzel95fe8fb2016-07-28 17:20:20 +020061 get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
Yinghai Luf55b58d2007-02-17 14:28:11 +000062 sbdn = sysconf.sbdn;
63
Paul Menzel95fe8fb2016-07-28 17:20:20 +020064 /* Align the table to be 16 byte aligned. */
65 addr += 15;
66 addr &= ~15;
Yinghai Luf55b58d2007-02-17 14:28:11 +000067
Paul Menzel95fe8fb2016-07-28 17:20:20 +020068 /* This table must be between 0xf0000 & 0x100000 */
69 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
Yinghai Luf55b58d2007-02-17 14:28:11 +000070
71 pirq = (void *)(addr);
Paul Menzel95fe8fb2016-07-28 17:20:20 +020072 v = (uint8_t *) (addr);
Stefan Reinauer14e22772010-04-27 06:56:47 +000073
Yinghai Luf55b58d2007-02-17 14:28:11 +000074 pirq->signature = PIRQ_SIGNATURE;
Paul Menzel95fe8fb2016-07-28 17:20:20 +020075 pirq->version = PIRQ_VERSION;
Stefan Reinauer14e22772010-04-27 06:56:47 +000076
Yinghai Luf55b58d2007-02-17 14:28:11 +000077 pirq->rtr_bus = bus_mcp55[0];
Paul Menzel95fe8fb2016-07-28 17:20:20 +020078 pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
Yinghai Luf55b58d2007-02-17 14:28:11 +000079
80 pirq->exclusive_irqs = 0;
Stefan Reinauer14e22772010-04-27 06:56:47 +000081
Yinghai Luf55b58d2007-02-17 14:28:11 +000082 pirq->rtr_vendor = 0x10de;
83 pirq->rtr_device = 0x0370;
84
85 pirq->miniport_data = 0;
86
87 memset(pirq->rfu, 0, sizeof(pirq->rfu));
88
Paul Menzel95fe8fb2016-07-28 17:20:20 +020089 pirq_info = (void *)(&pirq->checksum + 1);
Yinghai Luf55b58d2007-02-17 14:28:11 +000090 slot_num = 0;
91//pci bridge
Paul Menzel95fe8fb2016-07-28 17:20:20 +020092 write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn + 6) << 3) | 0, 0x1,
93 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
94 pirq_info++;
95 slot_num++;
Stefan Reinauer14e22772010-04-27 06:56:47 +000096
97 pirq->size = 32 + 16 * slot_num;
Yinghai Luf55b58d2007-02-17 14:28:11 +000098
Paul Menzel95fe8fb2016-07-28 17:20:20 +020099 for (i = 0; i < pirq->size; i++)
100 sum += v[i];
Yinghai Luf55b58d2007-02-17 14:28:11 +0000101
102 sum = pirq->checksum - sum;
103
Paul Menzel95fe8fb2016-07-28 17:20:20 +0200104 if (sum != pirq->checksum) {
105 pirq->checksum = sum;
106 }
Yinghai Luf55b58d2007-02-17 14:28:11 +0000107
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000108 printk(BIOS_INFO, "done.\n");
Yinghai Luf55b58d2007-02-17 14:28:11 +0000109
Paul Menzel95fe8fb2016-07-28 17:20:20 +0200110 return (unsigned long)pirq_info;
Yinghai Luf55b58d2007-02-17 14:28:11 +0000111
112}