Gitiles
Code Review Sign In
review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / . / src / mainboard / siemens / mc_apl1 / Makefile.inc
blob: 9e3e892f66d925ca035afc4a10c178c5aef0c1e0 [file] [log] [blame]
Mario Scheithauer092db952017-01-31 15:45:13 +0100[diff] [blame]1bootblock-y += bootblock.c
2
3ramstage-y += mainboard.c