blob: a05cd90efff069b1cc61978a3099fc4aca00a2d7 [file] [log] [blame]
Lee Leahy5cb9dda2015-05-01 10:34:54 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Lee Leahy5cb9dda2015-05-01 10:34:54 -070014 */
15
16#include <soc/ramstage.h>
17#include <boardid.h>
18#include "onboard.h"
19
20void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
21{
Hannah Williams103f00d2016-01-25 14:36:56 -080022 params->ChvSvidConfig = SVID_PMIC_CONFIG;
23 params->PMIC_I2CBus = BCRD2_PMIC_I2C_BUS;
Lee Leahy5cb9dda2015-05-01 10:34:54 -070024}