blob: a17b519919cbe5dd8cd4f922b666823b3e00f9ed [file] [log] [blame]
Rizwan Qureshi5ff73902016-08-24 20:50:54 +05301/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <arch/byteorder.h>
16#include <cbfs.h>
17#include <console/console.h>
18#include <stdint.h>
19#include <string.h>
20#include <soc/pei_data.h>
21#include <soc/pei_wrapper.h>
22#include "boardid.h"
23#include "spd.h"
24
25void mainboard_fill_dq_map_data(void *dq_map_ptr)
26{
27 /* DQ byte map */
28 const u8 dq_map[2][12] = {
29 { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0 ,
30 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
31 { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0 ,
32 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
33 memcpy(dq_map_ptr, dq_map, sizeof(dq_map));
34}
35
36void mainboard_fill_dqs_map_data(void *dqs_map_ptr)
37{
38 /* DQS CPU<>DRAM map */
39 const u8 dqs_map[2][8] = {
40 { 0, 1, 3, 2, 6, 5, 4, 7 },
41 { 2, 3, 0, 1, 6, 7, 4, 5 } };
42 memcpy(dqs_map_ptr, dqs_map, sizeof(dqs_map));
43}
44
45void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
46{
47 /* Rcomp resistor */
48 const u16 RcompResistor[3] = { 200, 81, 162 };
49 memcpy(rcomp_ptr, RcompResistor,
50 sizeof(RcompResistor));
51}
52
53void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
54{
55 int mem_cfg_id;
56
57 mem_cfg_id = get_spd_index();
58 /* Rcomp target */
59 static const u16 RcompTarget[RCOMP_TARGET_PARAMS] = {
60 100, 40, 40, 23, 40 };
61
62 /* Strengthen the Rcomp Target Ctrl for 8GB K4E6E304EE -EGCF */
63 static const u16 StrengthendRcompTarget[RCOMP_TARGET_PARAMS] = {
64 100, 40, 40, 21, 40 };
65
66
67 if (mem_cfg_id == K4E6E304EE_MEM_ID) {
68 memcpy(rcomp_strength_ptr, StrengthendRcompTarget,
69 sizeof(StrengthendRcompTarget));
70 } else {
71 memcpy(rcomp_strength_ptr, RcompTarget, sizeof(RcompTarget));
72 }
73
74}
75
76uintptr_t mainboard_get_spd_data(void)
77{
78 char* spd_file;
79 int spd_index, spd_span;
80 size_t spd_file_len;
81
82 spd_index = get_spd_index();
83 printk(BIOS_INFO, "SPD index %d\n", spd_index);
84
85 /* Load SPD data from CBFS */
86 spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
87 &spd_file_len);
Rizwan Qureshic33f08b2016-09-16 19:45:08 +053088 if (!spd_file)
Rizwan Qureshi5ff73902016-08-24 20:50:54 +053089 die("SPD data not found.");
90
91 /* make sure we have at least one SPD in the file. */
92 if (spd_file_len < SPD_LEN)
93 die("Missing SPD data.");
94
95 /* Make sure we did not overrun the buffer */
96 if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
97 printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
98 spd_index = 0;
99 }
100
101 spd_span = spd_index * SPD_LEN;
102 return (uintptr_t)(spd_file + spd_span);
103}
104
105int mainboard_has_dual_channel_mem(void)
106{
107 int spd_index;
108
109 spd_index = get_spd_index();
110
111 if (spd_index != HYNIX_SINGLE_CHAN && spd_index != SAMSUNG_SINGLE_CHAN
112 && spd_index != MIC_SINGLE_CHAN) {
113 printk(BIOS_INFO,
114 "Dual channel SPD detected writing second channel\n");
115 return 1;
116 }
117 return 0;
118}