| Lee Leahy | 93dd5f7 | 2016-01-26 10:06:42 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Google Inc. |
| 5 | * Copyright (C) 2015-2016 Intel Corp. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| Lee Leahy | 102f625 | 2016-07-25 07:41:54 -0700 | [diff] [blame] | 17 | #if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) |
| Lee Leahy | 93dd5f7 | 2016-01-26 10:06:42 -0800 | [diff] [blame] | 18 | #include <fsp/romstage.h> |
| 19 | |
| 20 | /* All FSP specific code goes in this block */ |
| 21 | void mainboard_romstage_entry(struct romstage_params *rp) |
| 22 | { |
| 23 | /* Call back into chipset code with platform values updated. */ |
| 24 | romstage_common(rp); |
| 25 | } |
| Lee Leahy | 102f625 | 2016-07-25 07:41:54 -0700 | [diff] [blame] | 26 | #endif /* IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) */ |