Lee Leahy | 93dd5f7 | 2016-01-26 10:06:42 -0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2013 Google Inc. |
| 5 | ## Copyright (C) 2015-2016 Intel Corp. |
| 6 | ## |
| 7 | ## This program is free software; you can redistribute it and/or modify |
| 8 | ## it under the terms of the GNU General Public License as published by |
| 9 | ## the Free Software Foundation; version 2 of the License. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
| 16 | |
| 17 | chip soc/intel/quark |
| 18 | |
Lee Leahy | d76d60b | 2016-03-03 15:30:48 -0800 | [diff] [blame] | 19 | ############################################################ |
| 20 | # Set the parameters for MemoryInit |
| 21 | ############################################################ |
| 22 | |
Lee Leahy | dc54270 | 2016-06-18 18:52:43 -0700 | [diff] [blame] | 23 | register "AddrMode" = "0" |
| 24 | register "ChanMask" = "1" # Channel 0 enabled |
| 25 | register "ChanWidth" = "1" # 16-bit channel |
| 26 | register "DramDensity" = "1" # 1 Gib; |
| 27 | register "DramRonVal" = "0" # 34 Ohm |
| 28 | register "DramRttNomVal" = "2" # 120 Ohm |
| 29 | register "DramRttWrVal" = "0" # off |
| 30 | register "DramSpeed" = "0" # 800 MHz |
| 31 | register "DramType" = "0" # DDR3 |
| 32 | register "DramWidth" = "0" # 8-bit |
| 33 | register "EccScrubBlkSize" = "2" # 64 byte blocks |
| 34 | register "EccScrubInterval" = "0" # ECC scrub disabled |
| 35 | register "Flags" = "MRC_FLAG_SCRAMBLE_EN" |
| 36 | register "FspReservedMemoryLength" = "0x00100000" # Size in bytes |
| 37 | register "RankMask" = "1" # RANK 0 enabled |
| 38 | register "SmmTsegSize" = "0" # SMM Region size in MiB |
| 39 | register "SocRdOdtVal" = "0" # off |
| 40 | register "SocWrRonVal" = "1" # 32 Ohm |
| 41 | register "SocWrSlewRate" = "1" # 4V/nSec |
| 42 | register "SrInt" = "3" # 7.8 uSec |
| 43 | register "SrTemp" = "0" # normal |
| 44 | register "tCL" = "6" # clocks |
| 45 | register "tFAW" = "40000" # picoseconds |
| 46 | register "tRAS" = "37500" # picoseconds |
| 47 | register "tRRD" = "10000" # picoseconds |
| 48 | register "tWTR" = "10000" # picoseconds |
Lee Leahy | d76d60b | 2016-03-03 15:30:48 -0800 | [diff] [blame] | 49 | |
| 50 | ############################################################ |
| 51 | # Enable the devices |
| 52 | ############################################################ |
| 53 | |
Lee Leahy | 93dd5f7 | 2016-01-26 10:06:42 -0800 | [diff] [blame] | 54 | device domain 0 on |
| 55 | # EDS Table 3 |
Lee Leahy | 7fcaf77 | 2016-02-14 15:18:14 -0800 | [diff] [blame] | 56 | device pci 00.0 on end # 8086 0958 - Host Bridge |
Lee Leahy | 6d3cd08 | 2016-02-29 08:03:53 -0800 | [diff] [blame] | 57 | device pci 14.0 on end # 8086 08A7 - SD/SDIO/eMMC controller |
Lee Leahy | 7fcaf77 | 2016-02-14 15:18:14 -0800 | [diff] [blame] | 58 | device pci 14.1 off end # 8086 0936 - HSUART 0 |
Lee Leahy | 2772793 | 2016-05-22 10:07:20 -0700 | [diff] [blame] | 59 | device pci 14.2 on end # 8086 0939 - USB 2.0 Device port |
Lee Leahy | a9a06ee | 2016-02-28 11:35:29 -0800 | [diff] [blame] | 60 | device pci 14.3 on end # 8086 0939 - USB EHCI Host controller |
| 61 | device pci 14.4 on end # 8086 093A - USB OHCI Host controller |
Lee Leahy | 654fd07 | 2016-02-17 08:47:58 -0800 | [diff] [blame] | 62 | device pci 14.5 on end # 8086 0936 - HSUART 1 |
Lee Leahy | 7fcaf77 | 2016-02-14 15:18:14 -0800 | [diff] [blame] | 63 | device pci 14.6 off end # 8086 0937 - 10/100 Ethernet MAC 0 |
| 64 | device pci 14.7 off end # 8086 0937 - 10/100 Ethernet MAC 1 |
Lee Leahy | 1f1f2c4 | 2016-03-03 15:30:48 -0800 | [diff] [blame] | 65 | device pci 15.0 on end # 8086 0935 - SPI controller 0 |
| 66 | device pci 15.1 on end # 8086 0935 - SPI controller 1 |
Lee Leahy | b190079 | 2016-04-30 09:07:14 -0700 | [diff] [blame] | 67 | device pci 15.2 on end # 8086 0934 - I2C/GPIO controller |
Lee Leahy | 1845262 | 2016-02-16 08:26:03 -0800 | [diff] [blame] | 68 | device pci 17.0 on end # 8086 11C3 - PCIe Root Port 0 |
Lee Leahy | 7fcaf77 | 2016-02-14 15:18:14 -0800 | [diff] [blame] | 69 | device pci 17.1 off end # 8086 11C4 - PCIe Root Port 1 |
| 70 | device pci 1f.0 on end # 8086 095E - Legacy Bridge |
Lee Leahy | 93dd5f7 | 2016-01-26 10:06:42 -0800 | [diff] [blame] | 71 | end |
| 72 | end |