Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 The Chromium OS Authors. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <string.h> |
Kyösti Mälkki | 1645589 | 2014-04-28 23:41:06 +0300 | [diff] [blame] | 17 | #include <bootmode.h> |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 18 | #include <arch/io.h> |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 19 | #include <device/device.h> |
| 20 | #include <device/pci.h> |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 21 | #include <southbridge/intel/lynxpoint/pch.h> |
Patrick Rudolph | 273a8dc | 2016-02-06 18:07:59 +0100 | [diff] [blame] | 22 | #include <southbridge/intel/common/gpio.h> |
Aaron Durbin | b0f8151 | 2016-07-25 21:31:41 -0500 | [diff] [blame] | 23 | #include <vendorcode/google/chromeos/chromeos.h> |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 24 | |
| 25 | #ifndef __PRE_RAM__ |
| 26 | #include <boot/coreboot_tables.h> |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 27 | |
| 28 | #define GPIO_COUNT 6 |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 29 | |
| 30 | void fill_lb_gpios(struct lb_gpios *gpios) |
| 31 | { |
| 32 | device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); |
| 33 | u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe; |
| 34 | |
| 35 | if (!gpio_base) |
| 36 | return; |
| 37 | |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 38 | u32 gp_lvl = inl(gpio_base + GP_LVL); |
| 39 | u32 gp_lvl2 = inl(gpio_base + GP_LVL2); |
| 40 | u32 gp_lvl3 = inl(gpio_base + GP_LVL3); |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 41 | |
| 42 | gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); |
| 43 | gpios->count = GPIO_COUNT; |
| 44 | |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 45 | /* Write Protect: GPIO22 */ |
| 46 | gpios->gpios[0].port = 0; |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 47 | gpios->gpios[0].polarity = ACTIVE_LOW; |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 48 | gpios->gpios[0].value = (gp_lvl >> 22) & 1; |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 49 | strncpy((char *)gpios->gpios[0].name,"write protect", |
| 50 | GPIO_MAX_NAME_LENGTH); |
| 51 | |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 52 | /* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */ |
| 53 | gpios->gpios[1].port = 69; |
| 54 | gpios->gpios[1].polarity = ACTIVE_HIGH; |
| 55 | gpios->gpios[1].value = (gp_lvl3 >> (69-64)) & 1; |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 56 | strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH); |
| 57 | |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 58 | /* Developer: GPIO48 - BIOS_RESP - J8E4 (silkscreen: J8E3) */ |
| 59 | gpios->gpios[2].port = 48; |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 60 | gpios->gpios[2].polarity = ACTIVE_LOW; |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 61 | gpios->gpios[2].value = (gp_lvl2 >> (48-32)) & 1; |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 62 | strncpy((char *)gpios->gpios[2].name,"developer", GPIO_MAX_NAME_LENGTH); |
| 63 | |
| 64 | /* Hard code the lid switch GPIO to open. */ |
| 65 | gpios->gpios[3].port = -1; |
| 66 | gpios->gpios[3].polarity = ACTIVE_HIGH; |
| 67 | gpios->gpios[3].value = 1; |
| 68 | strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH); |
| 69 | |
| 70 | /* Power Button */ |
| 71 | gpios->gpios[4].port = -1; |
| 72 | gpios->gpios[4].polarity = ACTIVE_HIGH; |
| 73 | gpios->gpios[4].value = 0; |
| 74 | strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH); |
| 75 | |
| 76 | /* Did we load the VGA option ROM? */ |
| 77 | gpios->gpios[5].port = -1; |
| 78 | gpios->gpios[5].polarity = ACTIVE_HIGH; |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 79 | gpios->gpios[5].value = gfx_get_init_done(); |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 80 | strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH); |
| 81 | } |
| 82 | #endif |
| 83 | |
| 84 | int get_developer_mode_switch(void) |
| 85 | { |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 86 | /* |
| 87 | * Developer: GPIO48, Connected to J8E4, however the silkscreen says |
| 88 | * J8E3. The jumper is active low. |
| 89 | */ |
Patrick Rudolph | 273a8dc | 2016-02-06 18:07:59 +0100 | [diff] [blame] | 90 | return !get_gpio(48); |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | int get_recovery_mode_switch(void) |
| 94 | { |
Aaron Durbin | 0160d76 | 2012-12-13 16:51:41 -0600 | [diff] [blame] | 95 | /* |
| 96 | * Recovery: GPIO69, Connected to J8E3, however the silkscreen says |
| 97 | * J8E2. The jump is active high. |
| 98 | */ |
Patrick Rudolph | 273a8dc | 2016-02-06 18:07:59 +0100 | [diff] [blame] | 99 | return get_gpio(69); |
Aaron Durbin | f6933a6 | 2012-10-30 09:09:39 -0500 | [diff] [blame] | 100 | } |
| 101 | |
Aaron Durbin | 0df4de9 | 2013-03-01 17:38:59 -0600 | [diff] [blame] | 102 | int get_write_protect_state(void) |
| 103 | { |
| 104 | return 0; |
| 105 | } |
Aaron Durbin | b0f8151 | 2016-07-25 21:31:41 -0500 | [diff] [blame] | 106 | |
| 107 | static const struct cros_gpio cros_gpios[] = { |
| 108 | CROS_GPIO_REC_AH(69, CROS_GPIO_DEVICE_NAME), |
| 109 | CROS_GPIO_DEV_AL(48, CROS_GPIO_DEVICE_NAME), |
| 110 | CROS_GPIO_WP_AL(22, CROS_GPIO_DEVICE_NAME), |
| 111 | }; |
| 112 | |
| 113 | void mainboard_chromeos_acpi_generate(void) |
| 114 | { |
| 115 | chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); |
| 116 | } |