Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <stdint.h> |
| 17 | #include <string.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <arch/acpi.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <arch/stages.h> |
| 23 | #include <device/pnp_def.h> |
| 24 | #include <arch/cpu.h> |
| 25 | #include <cpu/x86/lapic.h> |
| 26 | #include <console/console.h> |
Aaron Durbin | dc9f5cd | 2015-09-08 13:34:43 -0500 | [diff] [blame] | 27 | #include <commonlib/loglevel.h> |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 28 | #include <cpu/amd/car.h> |
| 29 | #include <northbridge/amd/agesa/agesawrapper.h> |
Kyösti Mälkki | d610c58 | 2017-03-05 06:28:18 +0200 | [diff] [blame] | 30 | #include <northbridge/amd/agesa/agesa_helper.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 31 | #include <cpu/x86/bist.h> |
| 32 | #include <cpu/x86/lapic.h> |
| 33 | #include <southbridge/amd/agesa/hudson/hudson.h> |
| 34 | #include <cpu/amd/agesa/s3_resume.h> |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 35 | #include "cbmem.h" |
| 36 | |
| 37 | |
| 38 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 39 | { |
| 40 | u32 val; |
| 41 | |
Kyösti Mälkki | 59e0334 | 2016-11-20 11:03:13 +0200 | [diff] [blame] | 42 | /* Must come first to enable PCI MMCONF. */ |
| 43 | amd_initmmio(); |
| 44 | |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 45 | /* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for |
| 46 | * LpcClk[1:0]". To be consistent with Parmer, setting to 4mA |
| 47 | * even though the register is not documented in the Kabini BKDG. |
| 48 | * Otherwise the serial output is bad code. |
| 49 | */ |
| 50 | outb(0xD2, 0xcd6); |
| 51 | outb(0x00, 0xcd7); |
| 52 | |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 53 | /* Set LPC decode enables. */ |
| 54 | pci_devfn_t dev = PCI_DEV(0, 0x14, 3); |
| 55 | pci_write_config32(dev, 0x44, 0xff03ffd5); |
| 56 | |
| 57 | hudson_lpc_port80(); |
| 58 | |
| 59 | if (!cpu_init_detectedx && boot_cpu()) { |
| 60 | post_code(0x30); |
| 61 | |
| 62 | post_code(0x31); |
| 63 | console_init(); |
| 64 | } |
| 65 | |
| 66 | /* Halt if there was a built in self test failure */ |
| 67 | post_code(0x34); |
| 68 | report_bist_failure(bist); |
| 69 | |
| 70 | /* Load MPB */ |
| 71 | val = cpuid_eax(1); |
| 72 | printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); |
| 73 | printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); |
| 74 | |
| 75 | /* On Larne, after LpcClkDrvSth is set, it needs some time to be stable, because of the buffer ICS551M */ |
| 76 | int i; |
| 77 | for(i = 0; i < 200000; i++) |
| 78 | val = inb(0xcd6); |
| 79 | |
| 80 | post_code(0x37); |
| 81 | agesawrapper_amdinitreset(); |
| 82 | post_code(0x38); |
| 83 | printk(BIOS_DEBUG, "Got past yangtze_early_setup\n"); |
| 84 | |
| 85 | post_code(0x39); |
| 86 | |
| 87 | agesawrapper_amdinitearly(); |
Kyösti Mälkki | 78c5d58 | 2015-01-09 23:48:47 +0200 | [diff] [blame] | 88 | int s3resume = acpi_is_wakeup_s3(); |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 89 | if (!s3resume) { |
| 90 | post_code(0x40); |
| 91 | agesawrapper_amdinitpost(); |
| 92 | post_code(0x41); |
| 93 | agesawrapper_amdinitenv(); |
| 94 | /* TODO: Disable cache is not ok. */ |
| 95 | disable_cache_as_ram(); |
| 96 | } else { /* S3 detect */ |
| 97 | printk(BIOS_INFO, "S3 detected\n"); |
| 98 | |
| 99 | post_code(0x60); |
| 100 | agesawrapper_amdinitresume(); |
| 101 | |
Kyösti Mälkki | 48518f0 | 2014-11-25 14:20:57 +0200 | [diff] [blame] | 102 | amd_initcpuio(); |
Dave Frodin | c43bce5 | 2014-12-03 08:22:46 -0700 | [diff] [blame] | 103 | agesawrapper_amds3laterestore(); |
| 104 | |
| 105 | post_code(0x61); |
| 106 | prepare_for_resume(); |
| 107 | } |
| 108 | |
| 109 | outb(0xEA, 0xCD6); |
| 110 | outb(0x1, 0xcd7); |
| 111 | |
| 112 | post_code(0x50); |
| 113 | copy_and_run(); |
| 114 | |
| 115 | post_code(0x54); /* Should never see this post code. */ |
| 116 | } |