WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2013 Sage Electronic Engineering, LLC |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
| 18 | DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 |
| 19 | ) |
| 20 | { |
| 21 | #include "routing.asl" |
| 22 | } |
| 23 | */ |
| 24 | |
| 25 | /* Routing is in System Bus scope */ |
| 26 | Name(PR0, Package(){ |
| 27 | /* NB devices */ |
| 28 | /* Bus 0, Dev 0 - F16 Host Controller */ |
| 29 | |
| 30 | /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */ |
| 31 | /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */ |
| 32 | Package(){0x0001FFFF, 0, INTB, 0 }, |
| 33 | Package(){0x0001FFFF, 1, INTC, 0 }, |
| 34 | |
| 35 | |
| 36 | /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */ |
| 37 | Package(){0x0002FFFF, 0, INTC, 0 }, |
| 38 | Package(){0x0002FFFF, 1, INTD, 0 }, |
| 39 | Package(){0x0002FFFF, 2, INTA, 0 }, |
| 40 | Package(){0x0002FFFF, 3, INTB, 0 }, |
| 41 | |
| 42 | /* FCH devices */ |
| 43 | /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ |
| 44 | Package(){0x0014FFFF, 0, INTA, 0 }, |
| 45 | Package(){0x0014FFFF, 1, INTB, 0 }, |
| 46 | Package(){0x0014FFFF, 2, INTC, 0 }, |
| 47 | Package(){0x0014FFFF, 3, INTD, 0 }, |
| 48 | |
| 49 | /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ |
| 50 | /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */ |
| 51 | Package(){0x0012FFFF, 0, INTC, 0 }, |
| 52 | Package(){0x0012FFFF, 1, INTB, 0 }, |
| 53 | |
| 54 | Package(){0x0013FFFF, 0, INTC, 0 }, |
| 55 | Package(){0x0013FFFF, 1, INTB, 0 }, |
| 56 | |
| 57 | Package(){0x0016FFFF, 0, INTC, 0 }, |
| 58 | Package(){0x0016FFFF, 1, INTB, 0 }, |
| 59 | |
| 60 | /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ |
| 61 | Package(){0x0010FFFF, 0, INTC, 0 }, |
| 62 | Package(){0x0010FFFF, 1, INTB, 0 }, |
| 63 | |
| 64 | /* Bus 0, Dev 17 - SATA controller */ |
| 65 | Package(){0x0011FFFF, 0, INTD, 0 }, |
| 66 | |
| 67 | }) |
| 68 | |
| 69 | Name(APR0, Package(){ |
| 70 | /* NB devices in APIC mode */ |
| 71 | /* Bus 0, Dev 0 - F15 Host Controller */ |
| 72 | |
| 73 | /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */ |
WANG Siyuan | 616e6fb | 2013-09-23 15:11:11 +0800 | [diff] [blame] | 74 | Package(){0x0001FFFF, 0, 0, 44 }, |
| 75 | Package(){0x0001FFFF, 1, 0, 45 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 76 | |
| 77 | /* Bus 0, Dev 2 - PCIe Bridges */ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 78 | Package(){0x0002FFFF, 0, 0, 24 }, |
| 79 | Package(){0x0002FFFF, 1, 0, 25 }, |
| 80 | Package(){0x0002FFFF, 2, 0, 26 }, |
| 81 | Package(){0x0002FFFF, 3, 0, 27 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 82 | |
| 83 | |
| 84 | /* SB devices in APIC mode */ |
| 85 | /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ |
| 86 | Package(){0x0014FFFF, 0, 0, 16 }, |
| 87 | Package(){0x0014FFFF, 1, 0, 17 }, |
| 88 | Package(){0x0014FFFF, 2, 0, 18 }, |
| 89 | Package(){0x0014FFFF, 3, 0, 19 }, |
| 90 | |
| 91 | /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ |
| 92 | /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */ |
| 93 | Package(){0x0012FFFF, 0, 0, 18 }, |
| 94 | Package(){0x0012FFFF, 1, 0, 17 }, |
| 95 | |
| 96 | Package(){0x0013FFFF, 0, 0, 18 }, |
| 97 | Package(){0x0013FFFF, 1, 0, 17 }, |
| 98 | |
| 99 | Package(){0x0016FFFF, 0, 0, 18 }, |
| 100 | Package(){0x0016FFFF, 1, 0, 17 }, |
| 101 | |
| 102 | /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ |
| 103 | Package(){0x0010FFFF, 0, 0, 0x12}, |
| 104 | Package(){0x0010FFFF, 1, 0, 0x11}, |
| 105 | |
| 106 | /* Bus 0, Dev 17 - SATA controller */ |
| 107 | Package(){0x0011FFFF, 0, 0, 19 }, |
| 108 | |
| 109 | }) |
| 110 | |
| 111 | Name(PS2, Package(){ |
| 112 | Package(){0x0000FFFF, 0, INTC, 0 }, |
| 113 | Package(){0x0000FFFF, 1, INTD, 0 }, |
| 114 | Package(){0x0000FFFF, 2, INTA, 0 }, |
| 115 | Package(){0x0000FFFF, 3, INTB, 0 }, |
| 116 | }) |
| 117 | Name(APS2, Package(){ |
| 118 | Package(){0x0000FFFF, 0, 0, 18 }, |
| 119 | Package(){0x0000FFFF, 1, 0, 19 }, |
| 120 | Package(){0x0000FFFF, 2, 0, 16 }, |
| 121 | Package(){0x0000FFFF, 3, 0, 17 }, |
| 122 | }) |
| 123 | |
| 124 | /* GFX */ |
| 125 | Name(PS4, Package(){ |
| 126 | Package(){0x0000FFFF, 0, INTA, 0 }, |
| 127 | Package(){0x0000FFFF, 1, INTB, 0 }, |
| 128 | Package(){0x0000FFFF, 2, INTC, 0 }, |
| 129 | Package(){0x0000FFFF, 3, INTD, 0 }, |
| 130 | }) |
| 131 | Name(APS4, Package(){ |
| 132 | /* PCIe slot - Hooked to PCIe slot 4 */ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 133 | Package(){0x0000FFFF, 0, 0, 24 }, |
| 134 | Package(){0x0000FFFF, 1, 0, 25 }, |
| 135 | Package(){0x0000FFFF, 2, 0, 26 }, |
| 136 | Package(){0x0000FFFF, 3, 0, 27 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 137 | }) |
| 138 | |
| 139 | /* GPP 0 */ |
| 140 | Name(PS5, Package(){ |
| 141 | Package(){0x0000FFFF, 0, INTB, 0 }, |
| 142 | Package(){0x0000FFFF, 1, INTC, 0 }, |
| 143 | Package(){0x0000FFFF, 2, INTD, 0 }, |
| 144 | Package(){0x0000FFFF, 3, INTA, 0 }, |
| 145 | }) |
| 146 | Name(APS5, Package(){ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 147 | Package(){0x0000FFFF, 0, 0, 28 }, |
| 148 | Package(){0x0000FFFF, 1, 0, 29 }, |
| 149 | Package(){0x0000FFFF, 2, 0, 30 }, |
| 150 | Package(){0x0000FFFF, 3, 0, 31 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 151 | }) |
| 152 | |
| 153 | /* GPP 1 */ |
| 154 | Name(PS6, Package(){ |
| 155 | Package(){0x0000FFFF, 0, INTC, 0 }, |
| 156 | Package(){0x0000FFFF, 1, INTD, 0 }, |
| 157 | Package(){0x0000FFFF, 2, INTA, 0 }, |
| 158 | Package(){0x0000FFFF, 3, INTB, 0 }, |
| 159 | }) |
| 160 | Name(APS6, Package(){ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 161 | Package(){0x0000FFFF, 0, 0, 32 }, |
| 162 | Package(){0x0000FFFF, 1, 0, 33 }, |
| 163 | Package(){0x0000FFFF, 2, 0, 34 }, |
| 164 | Package(){0x0000FFFF, 3, 0, 35 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 165 | }) |
| 166 | |
| 167 | /* GPP 2 */ |
| 168 | Name(PS7, Package(){ |
| 169 | Package(){0x0000FFFF, 0, INTD, 0 }, |
| 170 | Package(){0x0000FFFF, 1, INTA, 0 }, |
| 171 | Package(){0x0000FFFF, 2, INTB, 0 }, |
| 172 | Package(){0x0000FFFF, 3, INTC, 0 }, |
| 173 | }) |
| 174 | Name(APS7, Package(){ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 175 | Package(){0x0000FFFF, 0, 0, 36 }, |
| 176 | Package(){0x0000FFFF, 1, 0, 37 }, |
| 177 | Package(){0x0000FFFF, 2, 0, 38 }, |
| 178 | Package(){0x0000FFFF, 3, 0, 39 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 179 | }) |
| 180 | |
| 181 | /* GPP 3 */ |
| 182 | Name(PS8, Package(){ |
| 183 | Package(){0x0000FFFF, 0, INTA, 0 }, |
| 184 | Package(){0x0000FFFF, 1, INTB, 0 }, |
| 185 | Package(){0x0000FFFF, 2, INTC, 0 }, |
| 186 | Package(){0x0000FFFF, 3, INTD, 0 }, |
| 187 | }) |
| 188 | Name(APS8, Package(){ |
Zheng Bao | 2666099 | 2015-11-09 20:13:19 +0800 | [diff] [blame] | 189 | Package(){0x0000FFFF, 0, 0, 40 }, |
| 190 | Package(){0x0000FFFF, 1, 0, 41 }, |
| 191 | Package(){0x0000FFFF, 2, 0, 42 }, |
| 192 | Package(){0x0000FFFF, 3, 0, 43 }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 193 | }) |