WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 14 | */ |
| 15 | |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 16 | #include <device/azalia.h> |
Kyösti Mälkki | 526c2fb | 2014-07-10 22:16:58 +0300 | [diff] [blame] | 17 | #include "AGESA.h" |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 18 | #include "amdlib.h" |
Kyösti Mälkki | 26f297e | 2014-05-26 11:27:54 +0300 | [diff] [blame] | 19 | #include <northbridge/amd/agesa/BiosCallOuts.h> |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 20 | #include "Ids.h" |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 21 | #include "heapManager.h" |
| 22 | #include "FchPlatform.h" |
| 23 | #include "cbfs.h" |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 24 | #include <stdlib.h> |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 25 | |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 26 | static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); |
Kyösti Mälkki | f5f9e38 | 2014-10-17 23:21:01 +0300 | [diff] [blame] | 27 | |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 28 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 29 | { |
Kyösti Mälkki | 83cc3b0 | 2014-05-04 23:13:08 +0300 | [diff] [blame] | 30 | {AGESA_DO_RESET, agesa_Reset }, |
Kyösti Mälkki | c5cc9f2 | 2014-10-17 22:33:22 +0300 | [diff] [blame] | 31 | {AGESA_READ_SPD, agesa_ReadSpd }, |
Kyösti Mälkki | 83cc3b0 | 2014-05-04 23:13:08 +0300 | [diff] [blame] | 32 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
| 33 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
| 34 | {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, |
| 35 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 36 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 37 | {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, |
Kyösti Mälkki | cb989f2 | 2014-05-04 23:13:08 +0300 | [diff] [blame] | 38 | {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 39 | }; |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 40 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 41 | |
| 42 | /** |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 43 | * CODEC Initialization Table for Azalia HD Audio using Realtek ALC662 chip |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 44 | */ |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 45 | static const CODEC_ENTRY Alc662_VerbTbl[] = |
| 46 | { |
| 47 | { 0x14, /*01014010*/ /* Port D - green headphone jack */ |
| 48 | (AZALIA_PINCFG_PORT_JACK << 30) |
| 49 | | ((AZALIA_PINCFG_LOCATION_EXTERNAL | AZALIA_PINCFG_LOCATION_REAR) << 24) |
| 50 | | (AZALIA_PINCFG_DEVICE_LINEOUT << 20) |
| 51 | | (AZALIA_PINCFG_CONN_MINI_HEADPHONE_JACK << 16) |
| 52 | | (AZALIA_PINCFG_COLOR_GREEN << 12) |
| 53 | | (1 << 4) |
| 54 | | (0 << 0) |
| 55 | }, |
| 56 | { 0x15, /*0x90170120*/ /* Port A - white speaker header */ |
| 57 | (AZALIA_PINCFG_PORT_FIXED << 30) |
| 58 | | (AZALIA_PINCFG_LOCATION_INTERNAL << 24) |
| 59 | | (AZALIA_PINCFG_DEVICE_SPEAKER << 20) |
| 60 | | (AZALIA_PINCFG_CONN_OTHER_ANALOG << 16) |
| 61 | | (AZALIA_PINCFG_COLOR_WHITE << 12) |
| 62 | | (AZALIA_PINCFG_MISC_IGNORE_PRESENCE << 8) |
| 63 | | (2 << 4) |
| 64 | | (0 << 0) |
| 65 | }, |
| 66 | { 0x16, 0x411111F0 }, /* Port G - not connected */ |
| 67 | { 0x18, /*0x01A19040*/ /* Port B - pink headphone jack */ |
| 68 | (AZALIA_PINCFG_PORT_JACK << 30) |
| 69 | | ((AZALIA_PINCFG_LOCATION_EXTERNAL | AZALIA_PINCFG_LOCATION_REAR) << 24) |
| 70 | | (AZALIA_PINCFG_DEVICE_MICROPHONE << 20) |
| 71 | | (AZALIA_PINCFG_CONN_MINI_HEADPHONE_JACK << 16) |
| 72 | | (AZALIA_PINCFG_COLOR_PINK << 12) |
| 73 | | (4 << 4) |
| 74 | | (0 << 0) |
| 75 | }, |
| 76 | { 0x19, /*0x02A19050*/ /* Port F - front panel header mic */ |
| 77 | (AZALIA_PINCFG_PORT_NC << 30) |
| 78 | | ((AZALIA_PINCFG_LOCATION_EXTERNAL | AZALIA_PINCFG_LOCATION_FRONT) << 24) |
| 79 | | (AZALIA_PINCFG_DEVICE_MICROPHONE << 20) |
| 80 | | (AZALIA_PINCFG_CONN_MINI_HEADPHONE_JACK << 16) |
| 81 | | (AZALIA_PINCFG_COLOR_PINK << 12) |
| 82 | | (5 << 4) |
| 83 | | (0 << 0) |
| 84 | }, |
| 85 | { 0x1A, /*0x0181304F*/ /* Port C - NL blue headphone jack */ |
| 86 | (AZALIA_PINCFG_PORT_NC << 30) |
| 87 | | ((AZALIA_PINCFG_LOCATION_EXTERNAL | AZALIA_PINCFG_LOCATION_REAR) << 24) |
| 88 | | (AZALIA_PINCFG_DEVICE_LINEIN << 20) |
| 89 | | (AZALIA_PINCFG_CONN_MINI_HEADPHONE_JACK << 16) |
| 90 | | (AZALIA_PINCFG_COLOR_BLUE << 12) |
| 91 | | (4 << 4) |
| 92 | | (0xF << 0) |
| 93 | }, |
| 94 | { 0x1B, /*0x02214030*/ /* Port E - front panel line-out */ |
| 95 | (AZALIA_PINCFG_PORT_NC << 30) |
| 96 | | ((AZALIA_PINCFG_LOCATION_EXTERNAL | AZALIA_PINCFG_LOCATION_FRONT) << 24) |
| 97 | | (AZALIA_PINCFG_DEVICE_HP_OUT << 20) |
| 98 | | (AZALIA_PINCFG_CONN_MINI_HEADPHONE_JACK << 16) |
| 99 | | (AZALIA_PINCFG_COLOR_GREEN << 12) |
| 100 | | (3 << 4) |
| 101 | | (0 << 0) |
| 102 | }, |
| 103 | { 0x1C, 0x411111F0 }, /* CD-in - Not Connected */ |
| 104 | { 0x1D, 0x411111F0 }, /* PC Beep - Not Connected */ |
| 105 | { 0x1E, 0x411111F0 }, /* S/PDIF - Not connected */ |
| 106 | { 0xFF, 0xFFFFFFFF }, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 107 | }; |
| 108 | |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 109 | static const CODEC_TBL_LIST CodecTableList[] = |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 110 | { |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 111 | {0x10ec0662, (CODEC_ENTRY*)Alc662_VerbTbl}, |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 112 | {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} |
| 113 | }; |
| 114 | |
| 115 | #define FAN_INPUT_INTERNAL_DIODE 0 |
| 116 | #define FAN_INPUT_TEMP0 1 |
| 117 | #define FAN_INPUT_TEMP1 2 |
| 118 | #define FAN_INPUT_TEMP2 3 |
| 119 | #define FAN_INPUT_TEMP3 4 |
| 120 | #define FAN_INPUT_TEMP0_FILTER 5 |
| 121 | #define FAN_INPUT_ZERO 6 |
| 122 | #define FAN_INPUT_DISABLED 7 |
| 123 | |
| 124 | #define FAN_AUTOMODE (1 << 0) |
| 125 | #define FAN_LINEARMODE (1 << 1) |
| 126 | #define FAN_STEPMODE ~(1 << 1) |
| 127 | #define FAN_POLARITY_HIGH (1 << 2) |
| 128 | #define FAN_POLARITY_LOW ~(1 << 2) |
| 129 | |
| 130 | /* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */ |
| 131 | #define FREQ_28KHZ 0x0 |
| 132 | #define FREQ_25KHZ 0x1 |
| 133 | #define FREQ_23KHZ 0x2 |
| 134 | #define FREQ_21KHZ 0x3 |
| 135 | #define FREQ_29KHZ 0x4 |
| 136 | #define FREQ_18KHZ 0x5 |
| 137 | #define FREQ_100HZ 0xF7 |
| 138 | #define FREQ_87HZ 0xF8 |
| 139 | #define FREQ_58HZ 0xF9 |
| 140 | #define FREQ_44HZ 0xFA |
| 141 | #define FREQ_35HZ 0xFB |
| 142 | #define FREQ_29HZ 0xFC |
| 143 | #define FREQ_22HZ 0xFD |
| 144 | #define FREQ_14HZ 0xFE |
| 145 | #define FREQ_11HZ 0xFF |
| 146 | |
| 147 | /* imb_a180 Hardware Monitor Fan Control |
| 148 | * Hardware limitation: |
| 149 | * HWM failed to read the input temperture vi I2C, |
| 150 | * if other software switch the I2C switch by mistake or intention. |
| 151 | * We recommend to using IMC to control Fans, instead of HWM. |
| 152 | */ |
| 153 | #if 0 |
| 154 | static void oem_fan_control(FCH_DATA_BLOCK *FchParams) |
| 155 | { |
| 156 | FCH_HWM_FAN_CTR oem_factl[5] = { |
Paul Menzel | 02b5a74 | 2014-08-16 07:31:19 +0200 | [diff] [blame] | 157 | /* temperature input, fan mode, frequency, low_duty, med_duty, multiplier, lowtemp, medtemp, hightemp, LinearRange, LinearHoldCount */ |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 158 | /* imb_a180 FanOUT0 Fan header J32 */ |
| 159 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 160 | /* imb_a180 FanOUT1 Fan header J31*/ |
| 161 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 162 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 163 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 164 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 165 | }; |
Elyes HAOUAS | ec28aad | 2016-10-03 21:32:58 +0200 | [diff] [blame] | 166 | LibAmdMemCopy ((VOID *)(FchParams->Hwm.HwmFanControl), &oem_factl, (sizeof(FCH_HWM_FAN_CTR) * 5), FchParams->StdHeader); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 167 | |
| 168 | /* Enable IMC fan control. the recommand way */ |
| 169 | #if defined CONFIG_HUDSON_IMC_FWM && (CONFIG_HUDSON_IMC_FWM == 1) |
| 170 | /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ |
| 171 | FchParams->Hwm.HwMonitorEnable = TRUE; |
| 172 | FchParams->Hwm.HwmFchtsiAutoPoll = FALSE;/* 0 disable, 1 enable TSI Auto Polling */ |
| 173 | |
| 174 | FchParams->Imc.ImcEnable = TRUE; |
| 175 | FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */ |
| 176 | FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC , 1 enable IMC, 0 following hw strap setting */ |
| 177 | |
| 178 | LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader); |
| 179 | |
| 180 | /* Thermal Zone Parameter */ |
| 181 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00; |
| 182 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */ |
| 183 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x00; //BIT0 | BIT2 | BIT5; |
| 184 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x00;//6 | BIT3; |
| 185 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00; |
| 186 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x00; |
| 187 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 188 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 2; |
| 189 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0; /* PWM steping rate in unit of PWM level percentage */ |
| 190 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0; |
| 191 | |
| 192 | /* IMC Fan Policy temperature thresholds */ |
| 193 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00; |
| 194 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */ |
| 195 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0;///80; /*AC0 threshold in Celsius */ |
| 196 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0; /*AC1 threshold in Celsius */ |
| 197 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0; /*AC2 threshold in Celsius */ |
| 198 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0; /*AC3 threshold in Celsius, 0xFF is not define */ |
| 199 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0; /*AC4 threshold in Celsius, 0xFF is not define */ |
| 200 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0; /*AC5 threshold in Celsius, 0xFF is not define */ |
| 201 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0; /*AC6 threshold in Celsius, 0xFF is not define */ |
| 202 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0; /*AC7 lowest threshold in Celsius, 0xFF is not define */ |
| 203 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0; /*critical threshold* in Celsius, 0xFF is not define */ |
| 204 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00; |
| 205 | |
| 206 | /* IMC Fan Policy PWM Settings */ |
| 207 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00; |
| 208 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */ |
| 209 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0; /* AL0 percentage */ |
| 210 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0; /* AL1 percentage */ |
| 211 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0; /* AL2 percentage */ |
| 212 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0x00; /* AL3 percentage */ |
| 213 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0x00; /* AL4 percentage */ |
| 214 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0x00; /* AL5 percentage */ |
| 215 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0x00; /* AL6 percentage */ |
| 216 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0x00; /* AL7 percentage */ |
| 217 | |
| 218 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg0 = 0x00; |
| 219 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg1 = 0x01; /* Zone */ |
| 220 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg2 = 0x55;//BIT0 | BIT2 | BIT5; |
| 221 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg3 = 0x17; |
| 222 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg4 = 0x00; |
| 223 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg5 = 0x00; |
| 224 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg6 = 0x90; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 225 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg7 = 0; |
| 226 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg8 = 0; /* PWM steping rate in unit of PWM level percentage */ |
| 227 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg9 = 0; |
| 228 | |
| 229 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg0 = 0x00; |
| 230 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg1 = 0x01; /* zone */ |
| 231 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg2 = 60; /*AC0 threshold in Celsius */ |
| 232 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg3 = 40; /*AC1 threshold in Celsius */ |
| 233 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg4 = 0; /*AC2 threshold in Celsius */ |
| 234 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg5 = 0; /*AC3 threshold in Celsius, 0xFF is not define */ |
| 235 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg6 = 0; /*AC4 threshold in Celsius, 0xFF is not define */ |
| 236 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg7 = 0; /*AC5 threshold in Celsius, 0xFF is not define */ |
| 237 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg8 = 0; /*AC6 threshold in Celsius, 0xFF is not define */ |
| 238 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg9 = 0; /*AC7 lowest threshold in Celsius, 0xFF is not define */ |
| 239 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgRegA = 0; /*critical threshold* in Celsius, 0xFF is not define */ |
| 240 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgRegB = 0x00; |
| 241 | |
| 242 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg0 = 0x00; |
| 243 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg1 = 0x01; /*Zone */ |
| 244 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg2 = 0; /* AL0 percentage */ |
| 245 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg3 = 0; /* AL1 percentage */ |
| 246 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg4 = 0; /* AL2 percentage */ |
| 247 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg5 = 0x00; /* AL3 percentage */ |
| 248 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg6 = 0x00; /* AL4 percentage */ |
| 249 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg7 = 0x00; /* AL5 percentage */ |
| 250 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg8 = 0x00; /* AL6 percentage */ |
| 251 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg9 = 0x00; /* AL7 percentage */ |
| 252 | |
| 253 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg0 = 0x00; |
| 254 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg1 = 0x2; /* Zone */ |
| 255 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg2 = 0x0;//BIT0 | BIT2 | BIT5; |
| 256 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg3 = 0x0; |
| 257 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg4 = 0x00; |
| 258 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg5 = 0x00; |
| 259 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg6 = 0x98; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 260 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg7 = 2; |
| 261 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg8 = 5; /* PWM steping rate in unit of PWM level percentage */ |
| 262 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg9 = 0; |
| 263 | |
| 264 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg0 = 0x00; |
| 265 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg1 = 0x3; /* Zone */ |
| 266 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg2 = 0x0;//BIT0 | BIT2 | BIT5; |
| 267 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg3 = 0x0; |
| 268 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg4 = 0x00; |
| 269 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg5 = 0x00; |
| 270 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg6 = 0x0; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 271 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg7 = 0; |
| 272 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg8 = 0; /* PWM steping rate in unit of PWM level percentage */ |
| 273 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg9 = 0; |
| 274 | |
| 275 | /* IMC Function */ |
| 276 | FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x333;//BIT0 | BIT4 |BIT8; |
| 277 | |
| 278 | /* NOTE: |
| 279 | * FchInitLateHwm will overwrite the EcStruct with EcDefaultMassege, |
| 280 | * AGESA put EcDefaultMassege as global data in ROM, so we can't overwride it. |
| 281 | * so we remove it from AGESA code. Please Seee FchInitLateHwm. |
| 282 | */ |
| 283 | |
| 284 | #else /* HWM fan control, the way not recommand */ |
| 285 | FchParams->Imc.ImcEnable = FALSE; |
| 286 | FchParams->Hwm.HwMonitorEnable = TRUE; |
| 287 | FchParams->Hwm.HwmFchtsiAutoPoll = TRUE;/* 1 enable, 0 disable TSI Auto Polling */ |
| 288 | |
| 289 | #endif /* CONFIG_HUDSON_IMC_FWM */ |
| 290 | } |
| 291 | #endif |
| 292 | |
| 293 | /** |
| 294 | * Fch Oem setting callback |
| 295 | * |
| 296 | * Configure platform specific Hudson device, |
| 297 | * such Azalia, SATA, IMC etc. |
| 298 | */ |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 299 | static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 300 | { |
Kyösti Mälkki | dfad070 | 2014-07-10 06:32:36 +0300 | [diff] [blame] | 301 | AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 302 | |
Kyösti Mälkki | dfad070 | 2014-07-10 06:32:36 +0300 | [diff] [blame] | 303 | if (StdHeader->Func == AMD_INIT_RESET) { |
Kyösti Mälkki | b166628 | 2014-07-06 22:40:15 +0300 | [diff] [blame] | 304 | FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 305 | printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); |
| 306 | //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ |
Kyösti Mälkki | b166628 | 2014-07-06 22:40:15 +0300 | [diff] [blame] | 307 | FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); |
| 308 | FchParams_reset->FchReset.Xhci1Enable = FALSE; |
Kyösti Mälkki | dfad070 | 2014-07-10 06:32:36 +0300 | [diff] [blame] | 309 | } else if (StdHeader->Func == AMD_INIT_ENV) { |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 310 | FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; |
| 311 | printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); |
| 312 | |
| 313 | /* Azalia Controller OEM Codec Table Pointer */ |
Bruce Griffith | 5bdcff5 | 2013-08-23 19:48:17 -0600 | [diff] [blame] | 314 | FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST*)CodecTableList; |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 315 | /* Azalia Controller Front Panel OEM Table Pointer */ |
| 316 | |
| 317 | /* Fan Control */ |
| 318 | //oem_fan_control(FchParams_env); |
| 319 | |
| 320 | /* XHCI configuration */ |
Kyösti Mälkki | b166628 | 2014-07-06 22:40:15 +0300 | [diff] [blame] | 321 | FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 322 | FchParams_env->Usb.Xhci1Enable = FALSE; |
| 323 | |
| 324 | /* sata configuration */ |
| 325 | } |
| 326 | printk(BIOS_DEBUG, "Done\n"); |
| 327 | |
| 328 | return AGESA_SUCCESS; |
| 329 | } |