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Kerry Sheh6d6d18e2012-02-07 20:32:34 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080014 */
15
16#include <console/console.h>
17#include <string.h>
18#include <arch/acpi.h>
19#include <arch/acpigen.h>
20#include <arch/ioapic.h>
21#include <arch/io.h>
22#include <device/pci.h>
23#include <device/pci_ids.h>
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080024
Bruce Griffith93b57c52013-06-25 19:27:17 -060025#include <cpu/amd/amdfam15.h>
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080026
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080027unsigned long acpi_fill_madt(unsigned long current)
28{
29 device_t dev;
30 u32 dword;
31 u32 gsi_base = 0;
32 u32 apicid_sb700;
33 u32 apicid_rd890;
34
35 /*
36 * AGESA v5 Apply apic enumeration rules
37 * For systems with >= 16 APICs, put the IO-APICs at 0..n and
38 * put the local-APICs at m..z
39 * For systems with < 16 APICs, put the Local-APICs at 0..n and
40 * put the IO-APICs at (n + 1)..z
41 */
Kyösti Mälkkia6c525a2014-04-16 09:43:40 +030042 if (CONFIG_MAX_CPUS >= 16)
43 apicid_sb700 = 0x0;
44 else
45 apicid_sb700 = CONFIG_MAX_CPUS + 1;
46 apicid_rd890 = apicid_sb700 + 1;
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080047
48 /* create all subtables for processors */
49 current = acpi_create_madt_lapics(current);
50
51 /* Write sb700 IOAPIC, only one */
52 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
53 apicid_sb700,
54 IO_APIC_ADDR,
55 0
56 );
57
58 /* IOAPIC on rs5690 */
59 gsi_base += IO_APIC_INTERRUPTS; /* sb700 has 24 IOAPIC entries. */
60 dev = dev_find_slot(0, PCI_DEVFN(0, 0));
61 if (dev) {
62 pci_write_config32(dev, 0xF8, 0x1);
63 dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
64 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
65 apicid_rd890,
66 dword,
67 gsi_base
68 );
69 }
70
71 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current,
72 0, //BUS
73 0, //SOURCE
74 2, //gsirq
75 0 //flags
76 );
77
78 /* 0: mean bus 0--->ISA */
79 /* 0: PIC 0 */
80 /* 2: APIC 2 */
Kyösti Mälkkid8747572014-06-26 05:30:54 +030081 /* 5 mean: 0101 --> Edge-triggered, Active high */
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080082
83 /* create all subtables for processors */
84 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0, 5, 1);
85 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 1, 5, 1);
86 /* 1: LINT1 connect to NMI */
87
88 return current;
89}