blob: e907ab4ce22c20b7e19ec52e466c645c16527bc6 [file] [log] [blame]
huang lin365250e2014-08-06 16:43:43 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Rockchip Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
huang lin365250e2014-08-06 16:43:43 +080014 */
15
16#ifndef __DWC2_REGS_H__
17#define __DWC2_REGS_H__
huang lin41e24992015-05-20 17:27:10 +080018#include <usb/dwc2_registers.h>
huang lin365250e2014-08-06 16:43:43 +080019
20typedef struct dwc_ctrl {
21#define DMA_SIZE (64 * 1024)
22 void *dma_buffer;
Yunzhi Liaa336092015-06-19 17:09:04 +080023 u32 *hprt0;
24 u32 frame;
huang lin365250e2014-08-06 16:43:43 +080025} dwc_ctrl_t;
26
Yunzhi Liaa336092015-06-19 17:09:04 +080027typedef struct {
28 u8 *data;
29 endpoint_t *endp;
30 int reqsize;
31 u32 reqtiming;
32 u32 timestamp;
33} intr_queue_t;
34
Yunzhi Liebd3da72015-07-02 15:28:11 +080035typedef struct {
36 int hubaddr;
37 int hubport;
38} split_info_t;
39
huang lin365250e2014-08-06 16:43:43 +080040#define DWC2_INST(controller) ((dwc_ctrl_t *)((controller)->instance))
41#define DWC2_REG(controller) ((dwc2_reg_t *)((controller)->reg_base))
42
43typedef enum {
44 HCSTAT_DONE = 0,
45 HCSTAT_XFERERR,
46 HCSTAT_BABBLE,
47 HCSTAT_STALL,
Yunzhi Liebd3da72015-07-02 15:28:11 +080048 HCSTAT_ACK,
49 HCSTAT_NAK,
50 HCSTAT_NYET,
huang lin365250e2014-08-06 16:43:43 +080051 HCSTAT_UNKNOW,
52 HCSTAT_TIMEOUT,
Yunzhi Li49384262015-08-11 17:58:14 +080053 HCSTAT_DISCONNECTED,
huang lin365250e2014-08-06 16:43:43 +080054} hcstat_t;
55#endif