blob: 72a86994a9e121f40da3ebb309dd27348c43fcbf [file] [log] [blame]
Uwe Hermann2e5a9d92008-10-12 11:58:26 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <arch/pirq_routing.h>
22
Stefan Reinauera47bd912012-11-15 15:15:15 -080023static const struct irq_routing_table intel_irq_routing_table = {
Uwe Hermann2e5a9d92008-10-12 11:58:26 +000024 PIRQ_SIGNATURE,
25 PIRQ_VERSION,
Stefan Reinauer08670622009-06-30 15:17:49 +000026 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
Uwe Hermann2e5a9d92008-10-12 11:58:26 +000027 0x00, /* Interrupt router bus */
28 (0x11 << 3) | 0x0, /* Interrupt router device */
29 0x828, /* IRQs devoted exclusively to PCI usage */
30 0x1106, /* Vendor */
31 0x596, /* Device */
Uwe Hermann8fa90ec2010-09-21 21:16:27 +000032 0, /* Miniport data */
Uwe Hermann2e5a9d92008-10-12 11:58:26 +000033 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
34 0x3e, /* Checksum */
35 {
36 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
37 {0x00,(0x08<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x1, 0x0},
38 {0x00,(0x09<<3)|0x0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0x0def8}}, 0x2, 0x0},
39 {0x00,(0x0a<<3)|0x0, {{0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0x0def8}}, 0x3, 0x0},
40 {0x00,(0x0b<<3)|0x0, {{0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0x0def8}}, 0x4, 0x0},
41 {0x00,(0x0c<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x5, 0x0},
42 {0x00,(0x11<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
43 {0x00,(0x0f<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
44 {0x00,(0x01<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
45 {0x00,(0x10<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
46 {0x00,(0x12<<3)|0x0, {{0x01, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0},
47 }
48};
49
50unsigned long write_pirq_routing_table(unsigned long addr)
51{
Stefan Reinauera47bd912012-11-15 15:15:15 -080052 return copy_pirq_routing_table(addr, &intel_irq_routing_table);
Uwe Hermann2e5a9d92008-10-12 11:58:26 +000053}