Tobias Diedrich | 6222fe0 | 2010-11-09 22:11:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | * |
| 19 | * IRQ Routing Table |
| 20 | * |
| 21 | * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM |
| 22 | */ |
| 23 | #include <string.h> |
| 24 | #include <stdint.h> |
| 25 | #include <arch/pirq_routing.h> |
| 26 | #include <device/pci_ids.h> |
| 27 | |
| 28 | /* Free irqs are 3, 5, 10 and 11 */ |
| 29 | #define IRQBM ((1<<3)|(1<<5)|(1<<10)|(1<<11)) |
| 30 | |
| 31 | #define LNKA 1 |
| 32 | #define LNKB 2 |
| 33 | #define LNKC 3 |
| 34 | #define LNKD 4 |
| 35 | |
| 36 | /* |
| 37 | * For simplicity map LNK[E-H] to LNK[A-D]. |
| 38 | * This also means we are 82C596 compatible. |
| 39 | * Needs 0:11.0 0x46[4] set to 0. |
| 40 | */ |
| 41 | #define LNKE 1 |
| 42 | #define LNKF 2 |
| 43 | #define LNKG 3 |
| 44 | #define LNKH 4 |
| 45 | |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame^] | 46 | static const struct irq_routing_table intel_irq_routing_table = { |
Tobias Diedrich | 6222fe0 | 2010-11-09 22:11:00 +0000 | [diff] [blame] | 47 | PIRQ_SIGNATURE, /* u32 signature */ |
| 48 | PIRQ_VERSION, /* u16 version */ |
| 49 | 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ |
| 50 | 0, /* Where the interrupt router lies (bus) */ |
| 51 | (0x11<<3)|0, /* Where the interrupt router lies (dev) */ |
| 52 | 0, /* IRQs devoted exclusively to PCI usage */ |
| 53 | PCI_VENDOR_ID_VIA, /* Compatible Vendor (VIA) */ |
| 54 | PCI_DEVICE_ID_VIA_82C596, /* Compatible Device (82C596) */ |
| 55 | 0, /* Miniport data */ |
| 56 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 57 | 0x5f, /* u8 checksum, this has to be set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ |
| 58 | { |
| 59 | /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 60 | /* peg bridge */ |
| 61 | {0x00, (0x02 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x0, 0x0}, |
| 62 | /* pcie bridge */ |
| 63 | {0x00, (0x03 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x0, 0x0}, |
| 64 | /* sata/ide */ |
| 65 | {0x00, (0x0f << 3) | 0x0, {{0x00, 0x0000}, {LNKB, IRQBM}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, |
| 66 | /* usb */ |
| 67 | {0x00, (0x10 << 3) | 0x0, {{LNKA, IRQBM}, {LNKB, IRQBM}, {LNKC, IRQBM}, {LNKD, IRQBM}}, 0x0, 0x0}, |
| 68 | /* agp bus? */ |
| 69 | {0x01, (0x00 << 3) | 0x0, {{LNKA, IRQBM}, {LNKB, IRQBM}, {LNKC, IRQBM}, {LNKD, IRQBM}}, 0x0, 0x0}, |
| 70 | /* pcie graphics */ |
| 71 | {0x02, (0x00 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x6, 0x0}, |
| 72 | /* onboard pcie atl1 ethernet */ |
| 73 | {0x03, (0x00 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x0, 0x0}, |
| 74 | /* pcie slot */ |
| 75 | {0x04, (0x00 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x5, 0x0}, |
| 76 | /* onboard marvell mv6121 sata */ |
| 77 | {0x05, (0x00 << 3) | 0x0, {{LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}, {LNKH, IRQBM}}, 0x0, 0x0}, |
| 78 | /* Azalia HDAC */ |
| 79 | {0x06, (0x01 << 3) | 0x0, {{LNKB, IRQBM}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, |
| 80 | /* PCI slots */ |
| 81 | {0x07, (0x06 << 3) | 0x0, {{LNKA, IRQBM}, {LNKB, IRQBM}, {LNKC, IRQBM}, {LNKD, IRQBM}}, 0x1, 0x0}, |
| 82 | {0x07, (0x07 << 3) | 0x0, {{LNKB, IRQBM}, {LNKC, IRQBM}, {LNKD, IRQBM}, {LNKA, IRQBM}}, 0x2, 0x0}, |
| 83 | {0x07, (0x08 << 3) | 0x0, {{LNKC, IRQBM}, {LNKD, IRQBM}, {LNKA, IRQBM}, {LNKB, IRQBM}}, 0x3, 0x0}, |
| 84 | {0x07, (0x09 << 3) | 0x0, {{LNKD, IRQBM}, {LNKA, IRQBM}, {LNKB, IRQBM}, {LNKC, IRQBM}}, 0x4, 0x0}, |
| 85 | } |
| 86 | }; |
| 87 | |
| 88 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 89 | { |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame^] | 90 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
Tobias Diedrich | 6222fe0 | 2010-11-09 22:11:00 +0000 | [diff] [blame] | 91 | } |