blob: 82945ffe2bc1fe476b54ad9aa3acf930c675a20e [file] [log] [blame]
Angel Pons8a3453f2020-04-02 23:48:19 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Werner Zeh3cad2de2016-07-13 08:21:22 +02003
4#include <device/smbus.h>
5#include <version.h>
6#include <console/console.h>
7#include <bcd.h>
8#include "chip.h"
9
10/* Set RTC date from coreboot build date. */
11static void pcf8523_set_build_date(struct device *dev)
12{
13 smbus_write_byte(dev, YEAR_REG, coreboot_build_date.year);
14 smbus_write_byte(dev, MONTH_REG, coreboot_build_date.month);
15 smbus_write_byte(dev, WEEKDAY_REG, coreboot_build_date.weekday);
16 smbus_write_byte(dev, DAY_REG, coreboot_build_date.day);
17}
18
19/* Set RTC date from user defined date (available in e.g. device tree). */
20static void pcf8523_set_user_date(struct device *dev)
21{
22 struct drivers_i2c_pcf8523_config *config = dev->chip_info;
23 smbus_write_byte(dev, YEAR_REG, bin2bcd(config->user_year));
24 smbus_write_byte(dev, MONTH_REG, bin2bcd(config->user_month));
25 smbus_write_byte(dev, DAY_REG, bin2bcd(config->user_day));
26 smbus_write_byte(dev, WEEKDAY_REG, bin2bcd(config->user_weekday));
27}
28
29static void pcf8523_final(struct device *dev)
30{
31 /* Read back current RTC date and time and print it to the console. */
32 printk(BIOS_INFO, "%s: Current date %02d.%02d.%02d %02d:%02d:%02d\n",
33 dev->chip_ops->name,
34 bcd2bin(smbus_read_byte(dev, MONTH_REG)),
35 bcd2bin(smbus_read_byte(dev, DAY_REG)),
36 bcd2bin(smbus_read_byte(dev, YEAR_REG)),
37 bcd2bin(smbus_read_byte(dev, HOUR_REG)),
38 bcd2bin(smbus_read_byte(dev, MINUTE_REG)),
39 bcd2bin(smbus_read_byte(dev, SECOND_REG)) & ~OS_BIT);
40}
41
42static void pcf8523_init(struct device *dev)
43{
44 struct drivers_i2c_pcf8523_config *config = dev->chip_info;
45 uint8_t reg = 0;
46
47 if (!(smbus_read_byte(dev, SECOND_REG) & OS_BIT)) {
48 /* Set control registers to a known good value even if no
49 * power loss event was recognized. There were issues with
50 * this RTC in the past where control registers were
51 * corrupted and OS bit was not set. */
52 reg = smbus_read_byte(dev, CTRL_REG_1);
53 reg &= ~(STOP_BIT | CAP_SEL);
Werner Zehf1f322b2016-12-13 08:03:10 +010054 reg |= ((!!config->cap_sel) << 7);
Werner Zeh3cad2de2016-07-13 08:21:22 +020055 smbus_write_byte(dev, CTRL_REG_1, reg);
56 reg = smbus_read_byte(dev, CTRL_REG_3);
57 reg &= ~PM_MASK;
Werner Zehf1f322b2016-12-13 08:03:10 +010058 reg |= ((config->power_mode & 0x07) << 5);
Werner Zeh3cad2de2016-07-13 08:21:22 +020059 smbus_write_byte(dev, CTRL_REG_3, reg);
60 reg = smbus_read_byte(dev, TMR_CLKOUT_REG);
61 reg &= ~COF_MASK;
Werner Zehf1f322b2016-12-13 08:03:10 +010062 reg |= ((config->cof_selection & 0x07) << 3);
Werner Zeh3cad2de2016-07-13 08:21:22 +020063 smbus_write_byte(dev, TMR_CLKOUT_REG, reg);
64 return;
65 }
66
67 /* Initialize the RTC fully only if a power-loss event was recognized.
68 * In this case RTC will be set up with default date and time. */
69 smbus_write_byte(dev, CTRL_REG_1, ((!!config->cap_sel) << 7) |
70 ((!!config->second_int_en) << 2) |
71 ((!!config->alarm_int_en) << 1) |
72 (!!config->correction_int_en));
73
74 smbus_write_byte(dev, CTRL_REG_2, ((!!config->wdt_int_en) << 2) |
75 ((!!config->tmrA_int_en) << 1) |
76 (!!config->tmrB_int_en));
77
Werner Zehf1f322b2016-12-13 08:03:10 +010078 smbus_write_byte(dev, CTRL_REG_3, ((config->power_mode & 0x07) << 5) |
Werner Zeh3cad2de2016-07-13 08:21:22 +020079 ((!!config->bat_switch_int_en) << 1) |
80 (!!config->bat_low_int_en));
81
82 smbus_write_byte(dev, OFFSET_REG, ((!!config->offset_mode) << 7) |
83 (config->offset_val & 0x7f));
84
85 smbus_write_byte(dev, TMR_CLKOUT_REG, ((!!config->tmrA_int_mode) << 7) |
86 ((!!config->tmrB_int_mode) << 6) |
Werner Zehf1f322b2016-12-13 08:03:10 +010087 ((config->cof_selection & 0x07) << 3) |
Werner Zeh3cad2de2016-07-13 08:21:22 +020088 ((config->tmrA_mode & 0x03) << 1) |
89 (!!config->tmrB_mode));
90
91 smbus_write_byte(dev, TMR_A_FREQ_REG, (config->tmrA_prescaler & 0x7));
92
93 smbus_write_byte(dev, TMR_B_FREQ_REG, (config->tmrB_prescaler & 0x7) |
94 ((config->tmrB_pulse_cfg & 0x7) << 4));
95
96 /* Before setting the clock stop oscillator. */
97 reg = smbus_read_byte(dev, CTRL_REG_1);
98 reg |= STOP_BIT;
99 smbus_write_byte(dev, CTRL_REG_1, reg);
100 if (config->set_user_date) {
101 /* Set user date defined in device tree. */
102 printk(BIOS_DEBUG, "%s: Set to user date\n",
103 dev->chip_ops->name);
104 pcf8523_set_user_date(dev);
105 } else {
106 /* Set date from coreboot build. */
107 printk(BIOS_DEBUG, "%s: Set to coreboot build date\n",
108 dev->chip_ops->name);
109 pcf8523_set_build_date(dev);
110 }
111 /* Set time to 01:00:00 */
112 smbus_write_byte(dev, HOUR_REG, 1);
113 smbus_write_byte(dev, MINUTE_REG, 0);
114 smbus_write_byte(dev, SECOND_REG, 0);
115 /* Start oscillator again as the clock is set up now */
116 reg &= ~STOP_BIT;
117 smbus_write_byte(dev, CTRL_REG_1, reg);
118}
119
120static struct device_operations pcf8523c_ops = {
121 .read_resources = DEVICE_NOOP,
122 .set_resources = DEVICE_NOOP,
Werner Zeh3cad2de2016-07-13 08:21:22 +0200123 .init = pcf8523_init,
124 .final = pcf8523_final
125};
126
127static void pcf8523_enable(struct device *dev)
128{
129 dev->ops = &pcf8523c_ops;
130}
131
132struct chip_operations drivers_i2c_pcf8523_ops = {
133 CHIP_NAME("PCF8523")
134 .enable_dev = pcf8523_enable
135};