Angel Pons | f149d4c | 2020-04-03 01:23:38 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 2 | |
Aaron Durbin | e4f3e7a | 2015-03-17 13:25:19 -0500 | [diff] [blame] | 3 | #include <program_loading.h> |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Sam Lewis | 7cbf391 | 2020-08-06 21:13:22 +1000 | [diff] [blame] | 5 | #include <cbmem.h> |
Arthur Heymans | 3e914d3 | 2022-04-06 22:25:50 +0200 | [diff] [blame] | 6 | #include <romstage_common.h> |
Sam Lewis | 7cbf391 | 2020-08-06 21:13:22 +1000 | [diff] [blame] | 7 | |
| 8 | #include <soc/ti/am335x/sdram.h> |
| 9 | #include "ddr3.h" |
| 10 | |
| 11 | const struct ctrl_ioregs ioregs_bonelt = { |
| 12 | .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 13 | .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 14 | .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 15 | .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 16 | .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 17 | }; |
| 18 | |
| 19 | static const struct ddr_data ddr3_beagleblack_data = { |
| 20 | .datardsratio0 = MT41K256M16HA125E_RD_DQS, |
| 21 | .datawdsratio0 = MT41K256M16HA125E_WR_DQS, |
| 22 | .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, |
| 23 | .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, |
| 24 | }; |
| 25 | |
| 26 | static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = { |
| 27 | .cmd0csratio = MT41K256M16HA125E_RATIO, |
| 28 | .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 29 | |
| 30 | .cmd1csratio = MT41K256M16HA125E_RATIO, |
| 31 | .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 32 | |
| 33 | .cmd2csratio = MT41K256M16HA125E_RATIO, |
| 34 | .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 35 | }; |
| 36 | |
| 37 | static struct emif_regs ddr3_beagleblack_emif_reg_data = { |
| 38 | .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, |
| 39 | .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, |
| 40 | .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, |
| 41 | .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, |
| 42 | .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, |
| 43 | .ocp_config = EMIF_OCP_CONFIG_BEAGLEBONE_BLACK, |
| 44 | .zq_config = MT41K256M16HA125E_ZQ_CFG, |
| 45 | .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, |
| 46 | }; |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 47 | |
Arthur Heymans | a2bc254 | 2021-05-29 08:10:49 +0200 | [diff] [blame^] | 48 | #if CONFIG(SEPARATE_ROMSTAGE) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 49 | void main(void) |
| 50 | { |
Gabe Black | 81cbada | 2013-07-01 05:12:40 -0700 | [diff] [blame] | 51 | console_init(); |
| 52 | printk(BIOS_INFO, "Hello from romstage.\n"); |
Arthur Heymans | 3e914d3 | 2022-04-06 22:25:50 +0200 | [diff] [blame] | 53 | romstage_main(); |
| 54 | } |
Arthur Heymans | a2bc254 | 2021-05-29 08:10:49 +0200 | [diff] [blame^] | 55 | #endif |
Gabe Black | 81cbada | 2013-07-01 05:12:40 -0700 | [diff] [blame] | 56 | |
Arthur Heymans | 3e914d3 | 2022-04-06 22:25:50 +0200 | [diff] [blame] | 57 | void __noreturn romstage_main(void) |
| 58 | { |
Sam Lewis | 7cbf391 | 2020-08-06 21:13:22 +1000 | [diff] [blame] | 59 | config_ddr(400, &ioregs_bonelt, &ddr3_beagleblack_data, &ddr3_beagleblack_cmd_ctrl_data, |
| 60 | &ddr3_beagleblack_emif_reg_data, 0); |
| 61 | |
| 62 | cbmem_initialize_empty(); |
| 63 | |
Aaron Durbin | e4f3e7a | 2015-03-17 13:25:19 -0500 | [diff] [blame] | 64 | run_ramstage(); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 65 | } |